-- ==============================================================
-- RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2017.2
-- Copyright (C) 1986-2017 Xilinx, Inc. All Rights Reserved.
-- 
-- ===========================================================

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity design_1_v_frmbuf_wr_0_0_Bytes2AXIMMvideo is
port (
    ap_clk : IN STD_LOGIC;
    ap_rst : IN STD_LOGIC;
    ap_start : IN STD_LOGIC;
    ap_done : OUT STD_LOGIC;
    ap_continue : IN STD_LOGIC;
    ap_idle : OUT STD_LOGIC;
    ap_ready : OUT STD_LOGIC;
    bytes_plane0_V_V_dout : IN STD_LOGIC_VECTOR (63 downto 0);
    bytes_plane0_V_V_empty_n : IN STD_LOGIC;
    bytes_plane0_V_V_read : OUT STD_LOGIC;
    m_axi_dstImg_V_AWVALID : OUT STD_LOGIC;
    m_axi_dstImg_V_AWREADY : IN STD_LOGIC;
    m_axi_dstImg_V_AWADDR : OUT STD_LOGIC_VECTOR (31 downto 0);
    m_axi_dstImg_V_AWID : OUT STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_AWLEN : OUT STD_LOGIC_VECTOR (31 downto 0);
    m_axi_dstImg_V_AWSIZE : OUT STD_LOGIC_VECTOR (2 downto 0);
    m_axi_dstImg_V_AWBURST : OUT STD_LOGIC_VECTOR (1 downto 0);
    m_axi_dstImg_V_AWLOCK : OUT STD_LOGIC_VECTOR (1 downto 0);
    m_axi_dstImg_V_AWCACHE : OUT STD_LOGIC_VECTOR (3 downto 0);
    m_axi_dstImg_V_AWPROT : OUT STD_LOGIC_VECTOR (2 downto 0);
    m_axi_dstImg_V_AWQOS : OUT STD_LOGIC_VECTOR (3 downto 0);
    m_axi_dstImg_V_AWREGION : OUT STD_LOGIC_VECTOR (3 downto 0);
    m_axi_dstImg_V_AWUSER : OUT STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_WVALID : OUT STD_LOGIC;
    m_axi_dstImg_V_WREADY : IN STD_LOGIC;
    m_axi_dstImg_V_WDATA : OUT STD_LOGIC_VECTOR (63 downto 0);
    m_axi_dstImg_V_WSTRB : OUT STD_LOGIC_VECTOR (7 downto 0);
    m_axi_dstImg_V_WLAST : OUT STD_LOGIC;
    m_axi_dstImg_V_WID : OUT STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_WUSER : OUT STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_ARVALID : OUT STD_LOGIC;
    m_axi_dstImg_V_ARREADY : IN STD_LOGIC;
    m_axi_dstImg_V_ARADDR : OUT STD_LOGIC_VECTOR (31 downto 0);
    m_axi_dstImg_V_ARID : OUT STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_ARLEN : OUT STD_LOGIC_VECTOR (31 downto 0);
    m_axi_dstImg_V_ARSIZE : OUT STD_LOGIC_VECTOR (2 downto 0);
    m_axi_dstImg_V_ARBURST : OUT STD_LOGIC_VECTOR (1 downto 0);
    m_axi_dstImg_V_ARLOCK : OUT STD_LOGIC_VECTOR (1 downto 0);
    m_axi_dstImg_V_ARCACHE : OUT STD_LOGIC_VECTOR (3 downto 0);
    m_axi_dstImg_V_ARPROT : OUT STD_LOGIC_VECTOR (2 downto 0);
    m_axi_dstImg_V_ARQOS : OUT STD_LOGIC_VECTOR (3 downto 0);
    m_axi_dstImg_V_ARREGION : OUT STD_LOGIC_VECTOR (3 downto 0);
    m_axi_dstImg_V_ARUSER : OUT STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_RVALID : IN STD_LOGIC;
    m_axi_dstImg_V_RREADY : OUT STD_LOGIC;
    m_axi_dstImg_V_RDATA : IN STD_LOGIC_VECTOR (63 downto 0);
    m_axi_dstImg_V_RLAST : IN STD_LOGIC;
    m_axi_dstImg_V_RID : IN STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_RUSER : IN STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_RRESP : IN STD_LOGIC_VECTOR (1 downto 0);
    m_axi_dstImg_V_BVALID : IN STD_LOGIC;
    m_axi_dstImg_V_BREADY : OUT STD_LOGIC;
    m_axi_dstImg_V_BRESP : IN STD_LOGIC_VECTOR (1 downto 0);
    m_axi_dstImg_V_BID : IN STD_LOGIC_VECTOR (0 downto 0);
    m_axi_dstImg_V_BUSER : IN STD_LOGIC_VECTOR (0 downto 0);
    HwReg_frm_buffer_V_dout : IN STD_LOGIC_VECTOR (31 downto 0);
    HwReg_frm_buffer_V_empty_n : IN STD_LOGIC;
    HwReg_frm_buffer_V_read : OUT STD_LOGIC;
    HwReg_height_cast8_loc_dout : IN STD_LOGIC_VECTOR (8 downto 0);
    HwReg_height_cast8_loc_empty_n : IN STD_LOGIC;
    HwReg_height_cast8_loc_read : OUT STD_LOGIC;
    tmp_3_loc_dout : IN STD_LOGIC_VECTOR (11 downto 0);
    tmp_3_loc_empty_n : IN STD_LOGIC;
    tmp_3_loc_read : OUT STD_LOGIC;
    StrideInBytes : IN STD_LOGIC_VECTOR (15 downto 0) );
end;


architecture behav of design_1_v_frmbuf_wr_0_0_Bytes2AXIMMvideo is 
    constant ap_const_logic_1 : STD_LOGIC := '1';
    constant ap_const_logic_0 : STD_LOGIC := '0';
    constant ap_ST_fsm_state1 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001";
    constant ap_ST_fsm_state2 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010";
    constant ap_ST_fsm_state3 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100";
    constant ap_ST_fsm_pp0_stage0 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000";
    constant ap_ST_fsm_state7 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000";
    constant ap_ST_fsm_state8 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000";
    constant ap_ST_fsm_state9 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000";
    constant ap_ST_fsm_state10 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000";
    constant ap_ST_fsm_state11 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000";
    constant ap_ST_fsm_state12 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000";
    constant ap_ST_fsm_state13 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000";
    constant ap_ST_fsm_state14 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000";
    constant ap_ST_fsm_state15 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000";
    constant ap_ST_fsm_state16 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000";
    constant ap_ST_fsm_state17 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000";
    constant ap_ST_fsm_state18 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000";
    constant ap_ST_fsm_state19 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000";
    constant ap_ST_fsm_state20 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000";
    constant ap_ST_fsm_state21 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000";
    constant ap_ST_fsm_state22 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000";
    constant ap_ST_fsm_state23 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000";
    constant ap_ST_fsm_state24 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000";
    constant ap_ST_fsm_state25 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000";
    constant ap_ST_fsm_state26 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000";
    constant ap_ST_fsm_state27 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000";
    constant ap_ST_fsm_state28 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000";
    constant ap_ST_fsm_state29 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000";
    constant ap_ST_fsm_state30 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000";
    constant ap_ST_fsm_state31 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000";
    constant ap_ST_fsm_state32 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000";
    constant ap_ST_fsm_state33 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000";
    constant ap_ST_fsm_state34 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000";
    constant ap_ST_fsm_state35 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000";
    constant ap_ST_fsm_state36 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000";
    constant ap_ST_fsm_state37 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000";
    constant ap_ST_fsm_state38 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000";
    constant ap_ST_fsm_state39 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000";
    constant ap_ST_fsm_state40 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000";
    constant ap_ST_fsm_state41 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000";
    constant ap_ST_fsm_state42 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000";
    constant ap_ST_fsm_state43 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000";
    constant ap_ST_fsm_state44 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000";
    constant ap_ST_fsm_state45 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state46 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state47 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state48 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state49 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state50 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state51 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state52 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state53 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state54 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state55 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state56 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state57 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state58 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state59 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state60 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state61 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state62 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state63 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state64 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state65 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state66 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state67 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state68 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state69 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state70 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state71 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state72 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state73 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state74 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state75 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state76 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state77 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state78 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state79 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state80 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state81 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state82 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state83 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state84 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state85 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state86 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state87 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state88 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state89 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state90 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state91 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state92 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state93 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state94 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state95 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state96 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state97 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state98 : STD_LOGIC_VECTOR (107 downto 0) := "000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state99 : STD_LOGIC_VECTOR (107 downto 0) := "000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state100 : STD_LOGIC_VECTOR (107 downto 0) := "000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state101 : STD_LOGIC_VECTOR (107 downto 0) := "000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state102 : STD_LOGIC_VECTOR (107 downto 0) := "000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state103 : STD_LOGIC_VECTOR (107 downto 0) := "000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state104 : STD_LOGIC_VECTOR (107 downto 0) := "000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state105 : STD_LOGIC_VECTOR (107 downto 0) := "000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state106 : STD_LOGIC_VECTOR (107 downto 0) := "000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state107 : STD_LOGIC_VECTOR (107 downto 0) := "000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state108 : STD_LOGIC_VECTOR (107 downto 0) := "001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state109 : STD_LOGIC_VECTOR (107 downto 0) := "010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_ST_fsm_state110 : STD_LOGIC_VECTOR (107 downto 0) := "100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
    constant ap_const_lv32_0 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000000";
    constant ap_const_boolean_1 : BOOLEAN := true;
    constant ap_const_lv1_0 : STD_LOGIC_VECTOR (0 downto 0) := "0";
    constant ap_const_lv3_0 : STD_LOGIC_VECTOR (2 downto 0) := "000";
    constant ap_const_lv2_0 : STD_LOGIC_VECTOR (1 downto 0) := "00";
    constant ap_const_lv4_0 : STD_LOGIC_VECTOR (3 downto 0) := "0000";
    constant ap_const_lv32_3 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000011";
    constant ap_const_boolean_0 : BOOLEAN := false;
    constant ap_const_lv32_2 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000010";
    constant ap_const_lv32_6B : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000001101011";
    constant ap_const_lv32_1 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000001";
    constant ap_const_lv32_4 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000100";
    constant ap_const_lv1_1 : STD_LOGIC_VECTOR (0 downto 0) := "1";
    constant ap_const_lv29_0 : STD_LOGIC_VECTOR (28 downto 0) := "00000000000000000000000000000";
    constant ap_const_lv16_0 : STD_LOGIC_VECTOR (15 downto 0) := "0000000000000000";
    constant ap_const_lv14_0 : STD_LOGIC_VECTOR (13 downto 0) := "00000000000000";
    constant ap_const_lv8_FF : STD_LOGIC_VECTOR (7 downto 0) := "11111111";
    constant ap_const_lv32_1F : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000011111";
    constant ap_const_lv13_7 : STD_LOGIC_VECTOR (12 downto 0) := "0000000000111";
    constant ap_const_lv32_C : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001100";
    constant ap_const_lv32_F : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001111";
    constant ap_const_lv16_1 : STD_LOGIC_VECTOR (15 downto 0) := "0000000000000001";
    constant ap_const_lv14_1 : STD_LOGIC_VECTOR (13 downto 0) := "00000000000001";

    signal ap_done_reg : STD_LOGIC := '0';
    signal ap_CS_fsm : STD_LOGIC_VECTOR (107 downto 0) := "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001";
    attribute fsm_encoding : string;
    attribute fsm_encoding of ap_CS_fsm : signal is "none";
    signal ap_CS_fsm_state1 : STD_LOGIC;
    attribute fsm_encoding of ap_CS_fsm_state1 : signal is "none";
    signal bytes_plane0_V_V_blk_n : STD_LOGIC;
    signal ap_CS_fsm_pp0_stage0 : STD_LOGIC;
    attribute fsm_encoding of ap_CS_fsm_pp0_stage0 : signal is "none";
    signal ap_enable_reg_pp0_iter1 : STD_LOGIC := '0';
    signal ap_block_pp0_stage0_flag00000000 : BOOLEAN;
    signal exitcond_i_reg_339 : STD_LOGIC_VECTOR (0 downto 0);
    signal dstImg_V_blk_n_AW : STD_LOGIC;
    signal ap_CS_fsm_state3 : STD_LOGIC;
    attribute fsm_encoding of ap_CS_fsm_state3 : signal is "none";
    signal dstImg_V_blk_n_W : STD_LOGIC;
    signal ap_enable_reg_pp0_iter2 : STD_LOGIC := '0';
    signal ap_reg_pp0_iter1_exitcond_i_reg_339 : STD_LOGIC_VECTOR (0 downto 0);
    signal dstImg_V_blk_n_B : STD_LOGIC;
    signal ap_CS_fsm_state110 : STD_LOGIC;
    attribute fsm_encoding of ap_CS_fsm_state110 : signal is "none";
    signal HwReg_frm_buffer_V_blk_n : STD_LOGIC;
    signal HwReg_height_cast8_loc_blk_n : STD_LOGIC;
    signal tmp_3_loc_blk_n : STD_LOGIC;
    signal x_i_i_i_reg_175 : STD_LOGIC_VECTOR (13 downto 0);
    signal tmp_cast_i_fu_196_p1 : STD_LOGIC_VECTOR (29 downto 0);
    signal tmp_cast_i_reg_296 : STD_LOGIC_VECTOR (29 downto 0);
    signal ap_block_state1 : BOOLEAN;
    signal loopWidth_cast_i_i_c_fu_220_p1 : STD_LOGIC_VECTOR (13 downto 0);
    signal loopWidth_cast_i_i_c_reg_301 : STD_LOGIC_VECTOR (13 downto 0);
    signal tmp_15_cast_i_i_i_fu_224_p1 : STD_LOGIC_VECTOR (16 downto 0);
    signal tmp_15_cast_i_i_i_reg_306 : STD_LOGIC_VECTOR (16 downto 0);
    signal tmp_17_cast_i_i_i_fu_238_p1 : STD_LOGIC_VECTOR (28 downto 0);
    signal tmp_3_i_fu_242_p1 : STD_LOGIC_VECTOR (31 downto 0);
    signal tmp_3_i_reg_316 : STD_LOGIC_VECTOR (31 downto 0);
    signal y_fu_255_p2 : STD_LOGIC_VECTOR (15 downto 0);
    signal y_reg_324 : STD_LOGIC_VECTOR (15 downto 0);
    signal ap_CS_fsm_state2 : STD_LOGIC;
    attribute fsm_encoding of ap_CS_fsm_state2 : signal is "none";
    signal sum_i_fu_265_p2 : STD_LOGIC_VECTOR (29 downto 0);
    signal sum_i_reg_329 : STD_LOGIC_VECTOR (29 downto 0);
    signal exitcond_i_i_i_fu_250_p2 : STD_LOGIC_VECTOR (0 downto 0);
    signal ap_sig_ioackin_m_axi_dstImg_V_AWREADY : STD_LOGIC;
    signal exitcond_i_fu_280_p2 : STD_LOGIC_VECTOR (0 downto 0);
    signal ap_block_state4_pp0_stage0_iter0 : BOOLEAN;
    signal ap_block_state5_pp0_stage0_iter1 : BOOLEAN;
    signal ap_block_state6_pp0_stage0_iter2 : BOOLEAN;
    signal ap_sig_ioackin_m_axi_dstImg_V_WREADY : STD_LOGIC;
    signal ap_block_state6_io : BOOLEAN;
    signal ap_block_pp0_stage0_flag00011001 : BOOLEAN;
    signal x_fu_285_p2 : STD_LOGIC_VECTOR (13 downto 0);
    signal ap_enable_reg_pp0_iter0 : STD_LOGIC := '0';
    signal tmp_V_reg_348 : STD_LOGIC_VECTOR (63 downto 0);
    signal yoffset_fu_291_p2 : STD_LOGIC_VECTOR (28 downto 0);
    signal yoffset_reg_353 : STD_LOGIC_VECTOR (28 downto 0);
    signal ap_CS_fsm_state7 : STD_LOGIC;
    attribute fsm_encoding of ap_CS_fsm_state7 : signal is "none";
    signal ap_block_pp0_stage0_flag00011011 : BOOLEAN;
    signal ap_condition_pp0_exit_iter0_state4 : STD_LOGIC;
    signal yoffset_i_i_i_reg_152 : STD_LOGIC_VECTOR (28 downto 0);
    signal y_i_i_i_reg_164 : STD_LOGIC_VECTOR (15 downto 0);
    signal sum_cast_i_fu_270_p1 : STD_LOGIC_VECTOR (31 downto 0);
    signal ap_reg_ioackin_m_axi_dstImg_V_AWREADY : STD_LOGIC := '0';
    signal ap_reg_ioackin_m_axi_dstImg_V_WREADY : STD_LOGIC := '0';
    signal ap_block_pp0_stage0_flag00001001 : BOOLEAN;
    signal tmp_fu_186_p4 : STD_LOGIC_VECTOR (28 downto 0);
    signal tmp_cast_i_i_cast_i_fu_200_p1 : STD_LOGIC_VECTOR (12 downto 0);
    signal tmp_i_i_i_fu_204_p2 : STD_LOGIC_VECTOR (12 downto 0);
    signal tmp_11_fu_210_p4 : STD_LOGIC_VECTOR (9 downto 0);
    signal tmp_17_i_i_i_fu_228_p4 : STD_LOGIC_VECTOR (12 downto 0);
    signal y_cast_i_i_i_fu_246_p1 : STD_LOGIC_VECTOR (16 downto 0);
    signal tmp_2_cast_i_fu_261_p1 : STD_LOGIC_VECTOR (29 downto 0);
    signal ap_NS_fsm : STD_LOGIC_VECTOR (107 downto 0);
    signal ap_idle_pp0 : STD_LOGIC;
    signal ap_enable_pp0 : STD_LOGIC;


begin




    ap_CS_fsm_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_CS_fsm <= ap_ST_fsm_state1;
            else
                ap_CS_fsm <= ap_NS_fsm;
            end if;
        end if;
    end process;


    ap_done_reg_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_done_reg <= ap_const_logic_0;
            else
                if ((ap_const_logic_1 = ap_continue)) then 
                    ap_done_reg <= ap_const_logic_0;
                elsif (((ap_const_logic_1 = ap_CS_fsm_state2) and (exitcond_i_i_i_fu_250_p2 = ap_const_lv1_1))) then 
                    ap_done_reg <= ap_const_logic_1;
                end if; 
            end if;
        end if;
    end process;


    ap_enable_reg_pp0_iter0_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_enable_reg_pp0_iter0 <= ap_const_logic_0;
            else
                if (((ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0) and (ap_const_logic_1 = ap_condition_pp0_exit_iter0_state4))) then 
                    ap_enable_reg_pp0_iter0 <= ap_const_logic_0;
                elsif (((ap_const_logic_1 = ap_CS_fsm_state3) and (ap_sig_ioackin_m_axi_dstImg_V_AWREADY = ap_const_logic_1))) then 
                    ap_enable_reg_pp0_iter0 <= ap_const_logic_1;
                end if; 
            end if;
        end if;
    end process;


    ap_enable_reg_pp0_iter1_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_enable_reg_pp0_iter1 <= ap_const_logic_0;
            else
                if ((ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0)) then
                    if ((ap_const_logic_1 = ap_condition_pp0_exit_iter0_state4)) then 
                        ap_enable_reg_pp0_iter1 <= (ap_condition_pp0_exit_iter0_state4 xor ap_const_logic_1);
                    elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then 
                        ap_enable_reg_pp0_iter1 <= ap_enable_reg_pp0_iter0;
                    end if;
                end if; 
            end if;
        end if;
    end process;


    ap_enable_reg_pp0_iter2_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_enable_reg_pp0_iter2 <= ap_const_logic_0;
            else
                if ((ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0)) then 
                    ap_enable_reg_pp0_iter2 <= ap_enable_reg_pp0_iter1;
                elsif (((ap_const_logic_1 = ap_CS_fsm_state3) and (ap_sig_ioackin_m_axi_dstImg_V_AWREADY = ap_const_logic_1))) then 
                    ap_enable_reg_pp0_iter2 <= ap_const_logic_0;
                end if; 
            end if;
        end if;
    end process;


    ap_reg_ioackin_m_axi_dstImg_V_AWREADY_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_reg_ioackin_m_axi_dstImg_V_AWREADY <= ap_const_logic_0;
            else
                if ((ap_const_logic_1 = ap_CS_fsm_state3)) then
                    if ((ap_sig_ioackin_m_axi_dstImg_V_AWREADY = ap_const_logic_1)) then 
                        ap_reg_ioackin_m_axi_dstImg_V_AWREADY <= ap_const_logic_0;
                    elsif ((ap_const_logic_1 = m_axi_dstImg_V_AWREADY)) then 
                        ap_reg_ioackin_m_axi_dstImg_V_AWREADY <= ap_const_logic_1;
                    end if;
                end if; 
            end if;
        end if;
    end process;


    ap_reg_ioackin_m_axi_dstImg_V_WREADY_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_reg_ioackin_m_axi_dstImg_V_WREADY <= ap_const_logic_0;
            else
                if (((ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_const_lv1_0 = ap_reg_pp0_iter1_exitcond_i_reg_339))) then
                    if ((ap_block_pp0_stage0_flag00011001 = ap_const_boolean_0)) then 
                        ap_reg_ioackin_m_axi_dstImg_V_WREADY <= ap_const_logic_0;
                    elsif (((ap_const_logic_1 = m_axi_dstImg_V_WREADY) and (ap_block_pp0_stage0_flag00001001 = ap_const_boolean_0))) then 
                        ap_reg_ioackin_m_axi_dstImg_V_WREADY <= ap_const_logic_1;
                    end if;
                end if; 
            end if;
        end if;
    end process;


    x_i_i_i_reg_175_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_block_pp0_stage0_flag00011001 = ap_const_boolean_0) and (ap_const_logic_1 = ap_enable_reg_pp0_iter0) and (ap_const_lv1_0 = exitcond_i_fu_280_p2))) then 
                x_i_i_i_reg_175 <= x_fu_285_p2;
            elsif (((ap_const_logic_1 = ap_CS_fsm_state3) and (ap_sig_ioackin_m_axi_dstImg_V_AWREADY = ap_const_logic_1))) then 
                x_i_i_i_reg_175 <= ap_const_lv14_0;
            end if; 
        end if;
    end process;

    y_i_i_i_reg_164_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_state110) and (m_axi_dstImg_V_BVALID = ap_const_logic_1))) then 
                y_i_i_i_reg_164 <= y_reg_324;
            elsif (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then 
                y_i_i_i_reg_164 <= ap_const_lv16_0;
            end if; 
        end if;
    end process;

    yoffset_i_i_i_reg_152_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_state110) and (m_axi_dstImg_V_BVALID = ap_const_logic_1))) then 
                yoffset_i_i_i_reg_152 <= yoffset_reg_353;
            elsif (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then 
                yoffset_i_i_i_reg_152 <= ap_const_lv29_0;
            end if; 
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_block_pp0_stage0_flag00011001 = ap_const_boolean_0))) then
                ap_reg_pp0_iter1_exitcond_i_reg_339 <= exitcond_i_reg_339;
                exitcond_i_reg_339 <= exitcond_i_fu_280_p2;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then
                    loopWidth_cast_i_i_c_reg_301(9 downto 0) <= loopWidth_cast_i_i_c_fu_220_p1(9 downto 0);
                    tmp_15_cast_i_i_i_reg_306(8 downto 0) <= tmp_15_cast_i_i_i_fu_224_p1(8 downto 0);
                    tmp_3_i_reg_316(9 downto 0) <= tmp_3_i_fu_242_p1(9 downto 0);
                    tmp_cast_i_reg_296(28 downto 0) <= tmp_cast_i_fu_196_p1(28 downto 0);
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_state2) and (ap_const_lv1_0 = exitcond_i_i_i_fu_250_p2))) then
                sum_i_reg_329 <= sum_i_fu_265_p2;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_const_lv1_0 = exitcond_i_reg_339) and (ap_block_pp0_stage0_flag00011001 = ap_const_boolean_0))) then
                tmp_V_reg_348 <= bytes_plane0_V_V_dout;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if ((ap_const_logic_1 = ap_CS_fsm_state2)) then
                y_reg_324 <= y_fu_255_p2;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if ((ap_const_logic_1 = ap_CS_fsm_state7)) then
                yoffset_reg_353 <= yoffset_fu_291_p2;
            end if;
        end if;
    end process;
    tmp_cast_i_reg_296(29) <= '0';
    loopWidth_cast_i_i_c_reg_301(13 downto 10) <= "0000";
    tmp_15_cast_i_i_i_reg_306(16 downto 9) <= "00000000";
    tmp_3_i_reg_316(31 downto 10) <= "0000000000000000000000";

    ap_NS_fsm_assign_proc : process (ap_start, ap_done_reg, ap_CS_fsm, ap_CS_fsm_state1, m_axi_dstImg_V_BVALID, HwReg_frm_buffer_V_empty_n, HwReg_height_cast8_loc_empty_n, tmp_3_loc_empty_n, ap_enable_reg_pp0_iter1, ap_CS_fsm_state3, ap_enable_reg_pp0_iter2, ap_CS_fsm_state110, ap_CS_fsm_state2, exitcond_i_i_i_fu_250_p2, ap_sig_ioackin_m_axi_dstImg_V_AWREADY, exitcond_i_fu_280_p2, ap_enable_reg_pp0_iter0, ap_block_pp0_stage0_flag00011011)
    begin
        case ap_CS_fsm is
            when ap_ST_fsm_state1 => 
                if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then
                    ap_NS_fsm <= ap_ST_fsm_state2;
                else
                    ap_NS_fsm <= ap_ST_fsm_state1;
                end if;
            when ap_ST_fsm_state2 => 
                if (((ap_const_logic_1 = ap_CS_fsm_state2) and (exitcond_i_i_i_fu_250_p2 = ap_const_lv1_1))) then
                    ap_NS_fsm <= ap_ST_fsm_state1;
                else
                    ap_NS_fsm <= ap_ST_fsm_state3;
                end if;
            when ap_ST_fsm_state3 => 
                if (((ap_const_logic_1 = ap_CS_fsm_state3) and (ap_sig_ioackin_m_axi_dstImg_V_AWREADY = ap_const_logic_1))) then
                    ap_NS_fsm <= ap_ST_fsm_pp0_stage0;
                else
                    ap_NS_fsm <= ap_ST_fsm_state3;
                end if;
            when ap_ST_fsm_pp0_stage0 => 
                if ((not(((ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_0))) and not(((ap_const_logic_1 = ap_enable_reg_pp0_iter0) and (ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0) and (exitcond_i_fu_280_p2 = ap_const_lv1_1) and (ap_enable_reg_pp0_iter1 = ap_const_logic_0))))) then
                    ap_NS_fsm <= ap_ST_fsm_pp0_stage0;
                elsif ((((ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_0)) or ((ap_const_logic_1 = ap_enable_reg_pp0_iter0) and (ap_block_pp0_stage0_flag00011011 = ap_const_boolean_0) and (exitcond_i_fu_280_p2 = ap_const_lv1_1) and (ap_enable_reg_pp0_iter1 = ap_const_logic_0)))) then
                    ap_NS_fsm <= ap_ST_fsm_state7;
                else
                    ap_NS_fsm <= ap_ST_fsm_pp0_stage0;
                end if;
            when ap_ST_fsm_state7 => 
                ap_NS_fsm <= ap_ST_fsm_state8;
            when ap_ST_fsm_state8 => 
                ap_NS_fsm <= ap_ST_fsm_state9;
            when ap_ST_fsm_state9 => 
                ap_NS_fsm <= ap_ST_fsm_state10;
            when ap_ST_fsm_state10 => 
                ap_NS_fsm <= ap_ST_fsm_state11;
            when ap_ST_fsm_state11 => 
                ap_NS_fsm <= ap_ST_fsm_state12;
            when ap_ST_fsm_state12 => 
                ap_NS_fsm <= ap_ST_fsm_state13;
            when ap_ST_fsm_state13 => 
                ap_NS_fsm <= ap_ST_fsm_state14;
            when ap_ST_fsm_state14 => 
                ap_NS_fsm <= ap_ST_fsm_state15;
            when ap_ST_fsm_state15 => 
                ap_NS_fsm <= ap_ST_fsm_state16;
            when ap_ST_fsm_state16 => 
                ap_NS_fsm <= ap_ST_fsm_state17;
            when ap_ST_fsm_state17 => 
                ap_NS_fsm <= ap_ST_fsm_state18;
            when ap_ST_fsm_state18 => 
                ap_NS_fsm <= ap_ST_fsm_state19;
            when ap_ST_fsm_state19 => 
                ap_NS_fsm <= ap_ST_fsm_state20;
            when ap_ST_fsm_state20 => 
                ap_NS_fsm <= ap_ST_fsm_state21;
            when ap_ST_fsm_state21 => 
                ap_NS_fsm <= ap_ST_fsm_state22;
            when ap_ST_fsm_state22 => 
                ap_NS_fsm <= ap_ST_fsm_state23;
            when ap_ST_fsm_state23 => 
                ap_NS_fsm <= ap_ST_fsm_state24;
            when ap_ST_fsm_state24 => 
                ap_NS_fsm <= ap_ST_fsm_state25;
            when ap_ST_fsm_state25 => 
                ap_NS_fsm <= ap_ST_fsm_state26;
            when ap_ST_fsm_state26 => 
                ap_NS_fsm <= ap_ST_fsm_state27;
            when ap_ST_fsm_state27 => 
                ap_NS_fsm <= ap_ST_fsm_state28;
            when ap_ST_fsm_state28 => 
                ap_NS_fsm <= ap_ST_fsm_state29;
            when ap_ST_fsm_state29 => 
                ap_NS_fsm <= ap_ST_fsm_state30;
            when ap_ST_fsm_state30 => 
                ap_NS_fsm <= ap_ST_fsm_state31;
            when ap_ST_fsm_state31 => 
                ap_NS_fsm <= ap_ST_fsm_state32;
            when ap_ST_fsm_state32 => 
                ap_NS_fsm <= ap_ST_fsm_state33;
            when ap_ST_fsm_state33 => 
                ap_NS_fsm <= ap_ST_fsm_state34;
            when ap_ST_fsm_state34 => 
                ap_NS_fsm <= ap_ST_fsm_state35;
            when ap_ST_fsm_state35 => 
                ap_NS_fsm <= ap_ST_fsm_state36;
            when ap_ST_fsm_state36 => 
                ap_NS_fsm <= ap_ST_fsm_state37;
            when ap_ST_fsm_state37 => 
                ap_NS_fsm <= ap_ST_fsm_state38;
            when ap_ST_fsm_state38 => 
                ap_NS_fsm <= ap_ST_fsm_state39;
            when ap_ST_fsm_state39 => 
                ap_NS_fsm <= ap_ST_fsm_state40;
            when ap_ST_fsm_state40 => 
                ap_NS_fsm <= ap_ST_fsm_state41;
            when ap_ST_fsm_state41 => 
                ap_NS_fsm <= ap_ST_fsm_state42;
            when ap_ST_fsm_state42 => 
                ap_NS_fsm <= ap_ST_fsm_state43;
            when ap_ST_fsm_state43 => 
                ap_NS_fsm <= ap_ST_fsm_state44;
            when ap_ST_fsm_state44 => 
                ap_NS_fsm <= ap_ST_fsm_state45;
            when ap_ST_fsm_state45 => 
                ap_NS_fsm <= ap_ST_fsm_state46;
            when ap_ST_fsm_state46 => 
                ap_NS_fsm <= ap_ST_fsm_state47;
            when ap_ST_fsm_state47 => 
                ap_NS_fsm <= ap_ST_fsm_state48;
            when ap_ST_fsm_state48 => 
                ap_NS_fsm <= ap_ST_fsm_state49;
            when ap_ST_fsm_state49 => 
                ap_NS_fsm <= ap_ST_fsm_state50;
            when ap_ST_fsm_state50 => 
                ap_NS_fsm <= ap_ST_fsm_state51;
            when ap_ST_fsm_state51 => 
                ap_NS_fsm <= ap_ST_fsm_state52;
            when ap_ST_fsm_state52 => 
                ap_NS_fsm <= ap_ST_fsm_state53;
            when ap_ST_fsm_state53 => 
                ap_NS_fsm <= ap_ST_fsm_state54;
            when ap_ST_fsm_state54 => 
                ap_NS_fsm <= ap_ST_fsm_state55;
            when ap_ST_fsm_state55 => 
                ap_NS_fsm <= ap_ST_fsm_state56;
            when ap_ST_fsm_state56 => 
                ap_NS_fsm <= ap_ST_fsm_state57;
            when ap_ST_fsm_state57 => 
                ap_NS_fsm <= ap_ST_fsm_state58;
            when ap_ST_fsm_state58 => 
                ap_NS_fsm <= ap_ST_fsm_state59;
            when ap_ST_fsm_state59 => 
                ap_NS_fsm <= ap_ST_fsm_state60;
            when ap_ST_fsm_state60 => 
                ap_NS_fsm <= ap_ST_fsm_state61;
            when ap_ST_fsm_state61 => 
                ap_NS_fsm <= ap_ST_fsm_state62;
            when ap_ST_fsm_state62 => 
                ap_NS_fsm <= ap_ST_fsm_state63;
            when ap_ST_fsm_state63 => 
                ap_NS_fsm <= ap_ST_fsm_state64;
            when ap_ST_fsm_state64 => 
                ap_NS_fsm <= ap_ST_fsm_state65;
            when ap_ST_fsm_state65 => 
                ap_NS_fsm <= ap_ST_fsm_state66;
            when ap_ST_fsm_state66 => 
                ap_NS_fsm <= ap_ST_fsm_state67;
            when ap_ST_fsm_state67 => 
                ap_NS_fsm <= ap_ST_fsm_state68;
            when ap_ST_fsm_state68 => 
                ap_NS_fsm <= ap_ST_fsm_state69;
            when ap_ST_fsm_state69 => 
                ap_NS_fsm <= ap_ST_fsm_state70;
            when ap_ST_fsm_state70 => 
                ap_NS_fsm <= ap_ST_fsm_state71;
            when ap_ST_fsm_state71 => 
                ap_NS_fsm <= ap_ST_fsm_state72;
            when ap_ST_fsm_state72 => 
                ap_NS_fsm <= ap_ST_fsm_state73;
            when ap_ST_fsm_state73 => 
                ap_NS_fsm <= ap_ST_fsm_state74;
            when ap_ST_fsm_state74 => 
                ap_NS_fsm <= ap_ST_fsm_state75;
            when ap_ST_fsm_state75 => 
                ap_NS_fsm <= ap_ST_fsm_state76;
            when ap_ST_fsm_state76 => 
                ap_NS_fsm <= ap_ST_fsm_state77;
            when ap_ST_fsm_state77 => 
                ap_NS_fsm <= ap_ST_fsm_state78;
            when ap_ST_fsm_state78 => 
                ap_NS_fsm <= ap_ST_fsm_state79;
            when ap_ST_fsm_state79 => 
                ap_NS_fsm <= ap_ST_fsm_state80;
            when ap_ST_fsm_state80 => 
                ap_NS_fsm <= ap_ST_fsm_state81;
            when ap_ST_fsm_state81 => 
                ap_NS_fsm <= ap_ST_fsm_state82;
            when ap_ST_fsm_state82 => 
                ap_NS_fsm <= ap_ST_fsm_state83;
            when ap_ST_fsm_state83 => 
                ap_NS_fsm <= ap_ST_fsm_state84;
            when ap_ST_fsm_state84 => 
                ap_NS_fsm <= ap_ST_fsm_state85;
            when ap_ST_fsm_state85 => 
                ap_NS_fsm <= ap_ST_fsm_state86;
            when ap_ST_fsm_state86 => 
                ap_NS_fsm <= ap_ST_fsm_state87;
            when ap_ST_fsm_state87 => 
                ap_NS_fsm <= ap_ST_fsm_state88;
            when ap_ST_fsm_state88 => 
                ap_NS_fsm <= ap_ST_fsm_state89;
            when ap_ST_fsm_state89 => 
                ap_NS_fsm <= ap_ST_fsm_state90;
            when ap_ST_fsm_state90 => 
                ap_NS_fsm <= ap_ST_fsm_state91;
            when ap_ST_fsm_state91 => 
                ap_NS_fsm <= ap_ST_fsm_state92;
            when ap_ST_fsm_state92 => 
                ap_NS_fsm <= ap_ST_fsm_state93;
            when ap_ST_fsm_state93 => 
                ap_NS_fsm <= ap_ST_fsm_state94;
            when ap_ST_fsm_state94 => 
                ap_NS_fsm <= ap_ST_fsm_state95;
            when ap_ST_fsm_state95 => 
                ap_NS_fsm <= ap_ST_fsm_state96;
            when ap_ST_fsm_state96 => 
                ap_NS_fsm <= ap_ST_fsm_state97;
            when ap_ST_fsm_state97 => 
                ap_NS_fsm <= ap_ST_fsm_state98;
            when ap_ST_fsm_state98 => 
                ap_NS_fsm <= ap_ST_fsm_state99;
            when ap_ST_fsm_state99 => 
                ap_NS_fsm <= ap_ST_fsm_state100;
            when ap_ST_fsm_state100 => 
                ap_NS_fsm <= ap_ST_fsm_state101;
            when ap_ST_fsm_state101 => 
                ap_NS_fsm <= ap_ST_fsm_state102;
            when ap_ST_fsm_state102 => 
                ap_NS_fsm <= ap_ST_fsm_state103;
            when ap_ST_fsm_state103 => 
                ap_NS_fsm <= ap_ST_fsm_state104;
            when ap_ST_fsm_state104 => 
                ap_NS_fsm <= ap_ST_fsm_state105;
            when ap_ST_fsm_state105 => 
                ap_NS_fsm <= ap_ST_fsm_state106;
            when ap_ST_fsm_state106 => 
                ap_NS_fsm <= ap_ST_fsm_state107;
            when ap_ST_fsm_state107 => 
                ap_NS_fsm <= ap_ST_fsm_state108;
            when ap_ST_fsm_state108 => 
                ap_NS_fsm <= ap_ST_fsm_state109;
            when ap_ST_fsm_state109 => 
                ap_NS_fsm <= ap_ST_fsm_state110;
            when ap_ST_fsm_state110 => 
                if (((ap_const_logic_1 = ap_CS_fsm_state110) and (m_axi_dstImg_V_BVALID = ap_const_logic_1))) then
                    ap_NS_fsm <= ap_ST_fsm_state2;
                else
                    ap_NS_fsm <= ap_ST_fsm_state110;
                end if;
            when others =>  
                ap_NS_fsm <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
        end case;
    end process;

    HwReg_frm_buffer_V_blk_n_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, HwReg_frm_buffer_V_empty_n)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1))))) then 
            HwReg_frm_buffer_V_blk_n <= HwReg_frm_buffer_V_empty_n;
        else 
            HwReg_frm_buffer_V_blk_n <= ap_const_logic_1;
        end if; 
    end process;


    HwReg_frm_buffer_V_read_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, HwReg_frm_buffer_V_empty_n, HwReg_height_cast8_loc_empty_n, tmp_3_loc_empty_n)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then 
            HwReg_frm_buffer_V_read <= ap_const_logic_1;
        else 
            HwReg_frm_buffer_V_read <= ap_const_logic_0;
        end if; 
    end process;


    HwReg_height_cast8_loc_blk_n_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, HwReg_height_cast8_loc_empty_n)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1))))) then 
            HwReg_height_cast8_loc_blk_n <= HwReg_height_cast8_loc_empty_n;
        else 
            HwReg_height_cast8_loc_blk_n <= ap_const_logic_1;
        end if; 
    end process;


    HwReg_height_cast8_loc_read_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, HwReg_frm_buffer_V_empty_n, HwReg_height_cast8_loc_empty_n, tmp_3_loc_empty_n)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then 
            HwReg_height_cast8_loc_read <= ap_const_logic_1;
        else 
            HwReg_height_cast8_loc_read <= ap_const_logic_0;
        end if; 
    end process;

    ap_CS_fsm_pp0_stage0 <= ap_CS_fsm(3);
    ap_CS_fsm_state1 <= ap_CS_fsm(0);
    ap_CS_fsm_state110 <= ap_CS_fsm(107);
    ap_CS_fsm_state2 <= ap_CS_fsm(1);
    ap_CS_fsm_state3 <= ap_CS_fsm(2);
    ap_CS_fsm_state7 <= ap_CS_fsm(4);
        ap_block_pp0_stage0_flag00000000 <= not((ap_const_boolean_1 = ap_const_boolean_1));

    ap_block_pp0_stage0_flag00001001_assign_proc : process(bytes_plane0_V_V_empty_n, ap_enable_reg_pp0_iter1, exitcond_i_reg_339)
    begin
                ap_block_pp0_stage0_flag00001001 <= ((ap_const_logic_1 = ap_enable_reg_pp0_iter1) and (ap_const_lv1_0 = exitcond_i_reg_339) and (ap_const_logic_0 = bytes_plane0_V_V_empty_n));
    end process;


    ap_block_pp0_stage0_flag00011001_assign_proc : process(bytes_plane0_V_V_empty_n, ap_enable_reg_pp0_iter1, exitcond_i_reg_339, ap_enable_reg_pp0_iter2, ap_block_state6_io)
    begin
                ap_block_pp0_stage0_flag00011001 <= (((ap_const_logic_1 = ap_enable_reg_pp0_iter1) and (ap_const_lv1_0 = exitcond_i_reg_339) and (ap_const_logic_0 = bytes_plane0_V_V_empty_n)) or ((ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_const_boolean_1 = ap_block_state6_io)));
    end process;


    ap_block_pp0_stage0_flag00011011_assign_proc : process(bytes_plane0_V_V_empty_n, ap_enable_reg_pp0_iter1, exitcond_i_reg_339, ap_enable_reg_pp0_iter2, ap_block_state6_io)
    begin
                ap_block_pp0_stage0_flag00011011 <= (((ap_const_logic_1 = ap_enable_reg_pp0_iter1) and (ap_const_lv1_0 = exitcond_i_reg_339) and (ap_const_logic_0 = bytes_plane0_V_V_empty_n)) or ((ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_const_boolean_1 = ap_block_state6_io)));
    end process;


    ap_block_state1_assign_proc : process(ap_start, ap_done_reg, HwReg_frm_buffer_V_empty_n, HwReg_height_cast8_loc_empty_n, tmp_3_loc_empty_n)
    begin
                ap_block_state1 <= ((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n));
    end process;

        ap_block_state4_pp0_stage0_iter0 <= not((ap_const_boolean_1 = ap_const_boolean_1));

    ap_block_state5_pp0_stage0_iter1_assign_proc : process(bytes_plane0_V_V_empty_n, exitcond_i_reg_339)
    begin
                ap_block_state5_pp0_stage0_iter1 <= ((ap_const_lv1_0 = exitcond_i_reg_339) and (ap_const_logic_0 = bytes_plane0_V_V_empty_n));
    end process;


    ap_block_state6_io_assign_proc : process(ap_reg_pp0_iter1_exitcond_i_reg_339, ap_sig_ioackin_m_axi_dstImg_V_WREADY)
    begin
                ap_block_state6_io <= ((ap_const_lv1_0 = ap_reg_pp0_iter1_exitcond_i_reg_339) and (ap_const_logic_0 = ap_sig_ioackin_m_axi_dstImg_V_WREADY));
    end process;

        ap_block_state6_pp0_stage0_iter2 <= not((ap_const_boolean_1 = ap_const_boolean_1));

    ap_condition_pp0_exit_iter0_state4_assign_proc : process(exitcond_i_fu_280_p2)
    begin
        if ((exitcond_i_fu_280_p2 = ap_const_lv1_1)) then 
            ap_condition_pp0_exit_iter0_state4 <= ap_const_logic_1;
        else 
            ap_condition_pp0_exit_iter0_state4 <= ap_const_logic_0;
        end if; 
    end process;


    ap_done_assign_proc : process(ap_done_reg, ap_CS_fsm_state2, exitcond_i_i_i_fu_250_p2)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state2) and (exitcond_i_i_i_fu_250_p2 = ap_const_lv1_1))) then 
            ap_done <= ap_const_logic_1;
        else 
            ap_done <= ap_done_reg;
        end if; 
    end process;

    ap_enable_pp0 <= (ap_idle_pp0 xor ap_const_logic_1);

    ap_idle_assign_proc : process(ap_start, ap_CS_fsm_state1)
    begin
        if (((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_CS_fsm_state1))) then 
            ap_idle <= ap_const_logic_1;
        else 
            ap_idle <= ap_const_logic_0;
        end if; 
    end process;


    ap_idle_pp0_assign_proc : process(ap_enable_reg_pp0_iter1, ap_enable_reg_pp0_iter2, ap_enable_reg_pp0_iter0)
    begin
        if (((ap_const_logic_0 = ap_enable_reg_pp0_iter0) and (ap_const_logic_0 = ap_enable_reg_pp0_iter1) and (ap_const_logic_0 = ap_enable_reg_pp0_iter2))) then 
            ap_idle_pp0 <= ap_const_logic_1;
        else 
            ap_idle_pp0 <= ap_const_logic_0;
        end if; 
    end process;


    ap_ready_assign_proc : process(ap_CS_fsm_state2, exitcond_i_i_i_fu_250_p2)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state2) and (exitcond_i_i_i_fu_250_p2 = ap_const_lv1_1))) then 
            ap_ready <= ap_const_logic_1;
        else 
            ap_ready <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_ioackin_m_axi_dstImg_V_AWREADY_assign_proc : process(m_axi_dstImg_V_AWREADY, ap_reg_ioackin_m_axi_dstImg_V_AWREADY)
    begin
        if ((ap_const_logic_0 = ap_reg_ioackin_m_axi_dstImg_V_AWREADY)) then 
            ap_sig_ioackin_m_axi_dstImg_V_AWREADY <= m_axi_dstImg_V_AWREADY;
        else 
            ap_sig_ioackin_m_axi_dstImg_V_AWREADY <= ap_const_logic_1;
        end if; 
    end process;


    ap_sig_ioackin_m_axi_dstImg_V_WREADY_assign_proc : process(m_axi_dstImg_V_WREADY, ap_reg_ioackin_m_axi_dstImg_V_WREADY)
    begin
        if ((ap_const_logic_0 = ap_reg_ioackin_m_axi_dstImg_V_WREADY)) then 
            ap_sig_ioackin_m_axi_dstImg_V_WREADY <= m_axi_dstImg_V_WREADY;
        else 
            ap_sig_ioackin_m_axi_dstImg_V_WREADY <= ap_const_logic_1;
        end if; 
    end process;


    bytes_plane0_V_V_blk_n_assign_proc : process(bytes_plane0_V_V_empty_n, ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0_flag00000000, exitcond_i_reg_339)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_const_logic_1 = ap_enable_reg_pp0_iter1) and (ap_block_pp0_stage0_flag00000000 = ap_const_boolean_0) and (ap_const_lv1_0 = exitcond_i_reg_339))) then 
            bytes_plane0_V_V_blk_n <= bytes_plane0_V_V_empty_n;
        else 
            bytes_plane0_V_V_blk_n <= ap_const_logic_1;
        end if; 
    end process;


    bytes_plane0_V_V_read_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, exitcond_i_reg_339, ap_block_pp0_stage0_flag00011001)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_const_logic_1 = ap_enable_reg_pp0_iter1) and (ap_const_lv1_0 = exitcond_i_reg_339) and (ap_block_pp0_stage0_flag00011001 = ap_const_boolean_0))) then 
            bytes_plane0_V_V_read <= ap_const_logic_1;
        else 
            bytes_plane0_V_V_read <= ap_const_logic_0;
        end if; 
    end process;


    dstImg_V_blk_n_AW_assign_proc : process(m_axi_dstImg_V_AWREADY, ap_CS_fsm_state3)
    begin
        if ((ap_const_logic_1 = ap_CS_fsm_state3)) then 
            dstImg_V_blk_n_AW <= m_axi_dstImg_V_AWREADY;
        else 
            dstImg_V_blk_n_AW <= ap_const_logic_1;
        end if; 
    end process;


    dstImg_V_blk_n_B_assign_proc : process(m_axi_dstImg_V_BVALID, ap_CS_fsm_state110)
    begin
        if ((ap_const_logic_1 = ap_CS_fsm_state110)) then 
            dstImg_V_blk_n_B <= m_axi_dstImg_V_BVALID;
        else 
            dstImg_V_blk_n_B <= ap_const_logic_1;
        end if; 
    end process;


    dstImg_V_blk_n_W_assign_proc : process(m_axi_dstImg_V_WREADY, ap_block_pp0_stage0_flag00000000, ap_enable_reg_pp0_iter2, ap_reg_pp0_iter1_exitcond_i_reg_339)
    begin
        if (((ap_block_pp0_stage0_flag00000000 = ap_const_boolean_0) and (ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_const_lv1_0 = ap_reg_pp0_iter1_exitcond_i_reg_339))) then 
            dstImg_V_blk_n_W <= m_axi_dstImg_V_WREADY;
        else 
            dstImg_V_blk_n_W <= ap_const_logic_1;
        end if; 
    end process;

    exitcond_i_fu_280_p2 <= "1" when (x_i_i_i_reg_175 = loopWidth_cast_i_i_c_reg_301) else "0";
    exitcond_i_i_i_fu_250_p2 <= "1" when (y_cast_i_i_i_fu_246_p1 = tmp_15_cast_i_i_i_reg_306) else "0";
    loopWidth_cast_i_i_c_fu_220_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_11_fu_210_p4),14));
    m_axi_dstImg_V_ARADDR <= ap_const_lv32_0;
    m_axi_dstImg_V_ARBURST <= ap_const_lv2_0;
    m_axi_dstImg_V_ARCACHE <= ap_const_lv4_0;
    m_axi_dstImg_V_ARID <= ap_const_lv1_0;
    m_axi_dstImg_V_ARLEN <= ap_const_lv32_0;
    m_axi_dstImg_V_ARLOCK <= ap_const_lv2_0;
    m_axi_dstImg_V_ARPROT <= ap_const_lv3_0;
    m_axi_dstImg_V_ARQOS <= ap_const_lv4_0;
    m_axi_dstImg_V_ARREGION <= ap_const_lv4_0;
    m_axi_dstImg_V_ARSIZE <= ap_const_lv3_0;
    m_axi_dstImg_V_ARUSER <= ap_const_lv1_0;
    m_axi_dstImg_V_ARVALID <= ap_const_logic_0;
    m_axi_dstImg_V_AWADDR <= sum_cast_i_fu_270_p1;
    m_axi_dstImg_V_AWBURST <= ap_const_lv2_0;
    m_axi_dstImg_V_AWCACHE <= ap_const_lv4_0;
    m_axi_dstImg_V_AWID <= ap_const_lv1_0;
    m_axi_dstImg_V_AWLEN <= tmp_3_i_reg_316;
    m_axi_dstImg_V_AWLOCK <= ap_const_lv2_0;
    m_axi_dstImg_V_AWPROT <= ap_const_lv3_0;
    m_axi_dstImg_V_AWQOS <= ap_const_lv4_0;
    m_axi_dstImg_V_AWREGION <= ap_const_lv4_0;
    m_axi_dstImg_V_AWSIZE <= ap_const_lv3_0;
    m_axi_dstImg_V_AWUSER <= ap_const_lv1_0;

    m_axi_dstImg_V_AWVALID_assign_proc : process(ap_CS_fsm_state3, ap_reg_ioackin_m_axi_dstImg_V_AWREADY)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state3) and (ap_const_logic_0 = ap_reg_ioackin_m_axi_dstImg_V_AWREADY))) then 
            m_axi_dstImg_V_AWVALID <= ap_const_logic_1;
        else 
            m_axi_dstImg_V_AWVALID <= ap_const_logic_0;
        end if; 
    end process;


    m_axi_dstImg_V_BREADY_assign_proc : process(m_axi_dstImg_V_BVALID, ap_CS_fsm_state110)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state110) and (m_axi_dstImg_V_BVALID = ap_const_logic_1))) then 
            m_axi_dstImg_V_BREADY <= ap_const_logic_1;
        else 
            m_axi_dstImg_V_BREADY <= ap_const_logic_0;
        end if; 
    end process;

    m_axi_dstImg_V_RREADY <= ap_const_logic_0;
    m_axi_dstImg_V_WDATA <= tmp_V_reg_348;
    m_axi_dstImg_V_WID <= ap_const_lv1_0;
    m_axi_dstImg_V_WLAST <= ap_const_logic_0;
    m_axi_dstImg_V_WSTRB <= ap_const_lv8_FF;
    m_axi_dstImg_V_WUSER <= ap_const_lv1_0;

    m_axi_dstImg_V_WVALID_assign_proc : process(ap_enable_reg_pp0_iter2, ap_reg_pp0_iter1_exitcond_i_reg_339, ap_reg_ioackin_m_axi_dstImg_V_WREADY, ap_block_pp0_stage0_flag00001001)
    begin
        if (((ap_const_logic_1 = ap_enable_reg_pp0_iter2) and (ap_const_lv1_0 = ap_reg_pp0_iter1_exitcond_i_reg_339) and (ap_block_pp0_stage0_flag00001001 = ap_const_boolean_0) and (ap_const_logic_0 = ap_reg_ioackin_m_axi_dstImg_V_WREADY))) then 
            m_axi_dstImg_V_WVALID <= ap_const_logic_1;
        else 
            m_axi_dstImg_V_WVALID <= ap_const_logic_0;
        end if; 
    end process;

    sum_cast_i_fu_270_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(sum_i_reg_329),32));
    sum_i_fu_265_p2 <= std_logic_vector(unsigned(tmp_cast_i_reg_296) + unsigned(tmp_2_cast_i_fu_261_p1));
    tmp_11_fu_210_p4 <= tmp_i_i_i_fu_204_p2(12 downto 3);
    tmp_15_cast_i_i_i_fu_224_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(HwReg_height_cast8_loc_dout),17));
    tmp_17_cast_i_i_i_fu_238_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_17_i_i_i_fu_228_p4),29));
    tmp_17_i_i_i_fu_228_p4 <= StrideInBytes(15 downto 3);
    tmp_2_cast_i_fu_261_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(yoffset_i_i_i_reg_152),30));
    tmp_3_i_fu_242_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_11_fu_210_p4),32));

    tmp_3_loc_blk_n_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, tmp_3_loc_empty_n)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1))))) then 
            tmp_3_loc_blk_n <= tmp_3_loc_empty_n;
        else 
            tmp_3_loc_blk_n <= ap_const_logic_1;
        end if; 
    end process;


    tmp_3_loc_read_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, HwReg_frm_buffer_V_empty_n, HwReg_height_cast8_loc_empty_n, tmp_3_loc_empty_n)
    begin
        if (((ap_const_logic_1 = ap_CS_fsm_state1) and not(((ap_const_logic_0 = ap_start) or (ap_done_reg = ap_const_logic_1) or (ap_const_logic_0 = HwReg_frm_buffer_V_empty_n) or (ap_const_logic_0 = HwReg_height_cast8_loc_empty_n) or (ap_const_logic_0 = tmp_3_loc_empty_n))))) then 
            tmp_3_loc_read <= ap_const_logic_1;
        else 
            tmp_3_loc_read <= ap_const_logic_0;
        end if; 
    end process;

    tmp_cast_i_fu_196_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_fu_186_p4),30));
    tmp_cast_i_i_cast_i_fu_200_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_3_loc_dout),13));
    tmp_fu_186_p4 <= HwReg_frm_buffer_V_dout(31 downto 3);
    tmp_i_i_i_fu_204_p2 <= std_logic_vector(unsigned(tmp_cast_i_i_cast_i_fu_200_p1) + unsigned(ap_const_lv13_7));
    x_fu_285_p2 <= std_logic_vector(unsigned(x_i_i_i_reg_175) + unsigned(ap_const_lv14_1));
    y_cast_i_i_i_fu_246_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(y_i_i_i_reg_164),17));
    y_fu_255_p2 <= std_logic_vector(unsigned(y_i_i_i_reg_164) + unsigned(ap_const_lv16_1));
    yoffset_fu_291_p2 <= std_logic_vector(unsigned(tmp_17_cast_i_i_i_fu_238_p1) + unsigned(yoffset_i_i_i_reg_152));
end behav;
