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/*
 * helloworld.c: simple test application
 *
 * This application configures UART 16550 to baud rate 9600.
 * PS7 UART (Zynq) is not initialized by this application, since
 * bootrom/bsp configures it to baud rate 115200
 *
 * ------------------------------------------------
 * | UART TYPE   BAUD RATE                        |
 * ------------------------------------------------
 *   uartns550   9600
 *   uartlite    Configurable only in HW design
 *   ps7_uart    115200 (configured by bootrom/bsp)
 */

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"

#include "xil_io.h"
#include "xparameters.h"

#define PWM_BASE  XPAR_AXI_TIMER_0_BASEADDR
#define PWM_BASE2 XPAR_AXI_TIMER_1_BASEADDR




int main()
{
	init_platform ();

	/* Set the period and duty cycle of the PWM signal.
	* The first call sets TLR0 to have a period of 20ms.
	* The second call sets TLR0 to have a duty cycle of 50 % ( 10ms period ).
	* The formula to calculate the value to use is
	* ( period / clk_period ) - 2
	* The values are in nanoseconds
	* The clk_period is the period of the AXI Timer aclk input,
	* which is 100MHz ( 10ns period ) ( the default from FCLK ).
	*/
	Xil_Out32 ( PWM_BASE + 0x4 , ( 20e6 / 10 ) - 2 );
	//Xil_Out32 ( PWM_BASE + 0x14 , ( 10e6 / 10 ) - 2 );// Duty 50%
	Xil_Out32 ( PWM_BASE + 0x14 , ( 2.5*10e5 / 10 ) - 2 ); // Duty = 2.5ms/20ms, the left side
    Xil_Out32 ( PWM_BASE + 0x14 , ( 0.5*10e5 / 10 ) - 2 ); // Duty = 0.5ms/20ms, the right side




	/* Write our control values to the TCSRx registers.
	* In both , the PWMAx bit is set to enable PWM and
	* UDTx is set to put the timer in down count mode.
	* The GENTx bit is also set as required for PWM mode.
	* In the second write , we write also enable both timers
	*/
	Xil_Out32 ( PWM_BASE , 0x206 );
	Xil_Out32 ( PWM_BASE + 0x10 , 0x606 );

	printf ( "Initialization done...\n" );
    while(1){
    	/* Do Nothing */
    }

    cleanup_platform();
    return 0;
}
