VHDL Light Source Detection: Component VGA Block Diagram

Disclaimer: This article is a part of a larger build of VGA Component, make sure you start at the article VHDL Light Source Detection: Component VGA & Time Generator to read the main VGA Component article. There's the main article regarding this project here.

This article will explain the workings of the VGA Component .vhd file code through block diagram.

In this VGA block diagram, there is a counter, h_sync comparator, v_sync comparator, video on, and RGB. Each comparator has its own function and cannot stand alone, one of the example is to turn RGB comparator must require a data from the videoOn comparator.

The comparator here meant to be comparing either a fixed requirement or an input from other value, such as If x > 360.

From the example above, let's start with the Counter .

In Counter, the given input is pclk. The function of the Counter is to provide the timing for h_sync & v_sync when to change their state from low to high.

if rst is high, the other components will be low.

When the rst is low, the signal from the clock changes from low to high, h_counter will be added by 1 until it reaches 799, if it reaches 799, h_counter will return to 1.

next is v_counter will be added by 1 until it reaches 520. if it's reached 520, then v_counter will also return to 1.

both h_counter and v_counter are back to 1 due to there's a clear function, so they will be start counting again.

The end results from counter are h_pos and v_pos. Both of these will be distributed to other comparators, such as h_sync comparator, v_sync comparator, videoOn comparator, and RGB comparator.

The h_sync comparator receives h_pos signal generated by the Counter to tell h_sync will be low when h_pos reaches 16 to 112. The new output from h_sync comparator will generate a signal of 1 due to h_pos meets the requirements of h_sync comparator. To make a statement that h_sync will go low between 16 to 112, we put an inverter on the schematics, hence the end results will be changed from 1 to 0. Same goes to h_pos that didn't met the requirements of h_sync comparator, the result is 0, and it will be changed by the inverter to 1

Also the v_sync comparator receives a signal from the v_pos to tell v_sync will be low if v_pos reaches 8 to 11. it also putted an inverter to make the end result from 1 to 0 if v_pos met the v_sync comparator requirements. or 0 to 1 if v_pos didn't met the v_sync comparator requirements

In videoOn comparator, it has an inputs of rst, clk, h_pos, and v_pos.

If the input signal given from rst is 1, then the video on comparator will be produces a signal of 0, but if the rst is 0 , then the comparator will be active. Clock signal will go high and the comparator will read the signal from h_pos and v_pos

If h_pos is in the horizontal display zone, which is below 639 and v_pos is in the vertical display zone, which is below 479 then the videoOn comparator will produce a signal of 1.

If the conditions above didn't met, then the comparator will produce a videoOn signal of 0.

On to the last comparator, namely VGA RGB, or as in the .vhd file named as drawOn.

This comparator has an inputs of clk, rst, h_pos, v_pos, pixelout and videoOn signal.

If the input signal given from rst is 1, then the VGA Red, Green, and Blue comparators will produce signal of 0, but if the rst signal is 0, the comparator will be active, clock signal goes high and videoOn produces a signal of 1.

If h_pos is in the horizontal display zone and v_pos in the vertical display zone, VGA red, green, and blue comparators will produce a signal of 1, and the pixelout will assign the Y signal from YCbCr to VGA RGB to make a grayscale color, if the requirements of making VGA RGB to turn on are not met, then the VGA RGB signal will produce signal of 0.

Also there's a blanking zone, which is h_pos is below 160 and v_pos is below 40. here VGA RGB will be low.

Adrian Netzach Wibowo, Alfredo Fandy, Farrell Rabbani, Samuel W