Ten Bit Computer - VHDL

by tstarr-1 in Circuits > Computers

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Ten Bit Computer - VHDL

computerBlockDiagram.jpg

Made by: Tyler Starr and Ezzeedden Gazali

Introduction:

This project was completed as part of the final project for CPE 133 at Cal Poly SLO. It is a great project for someone looking to understand how computers function on their lowest level and how they achieve their tasks. The project is modeled after the 8-bit SAP computer described in Albert Malvino's book Digital Computer Electronics. However, we have increased the computer to 10-bits to allow for the implementation of more op codes (operation codes). The user can program the computer to perform a set of operations by inputting certain instructions.

System and Circuit Architecture:

The computer is written in VHDL and will be contained on the Basys 3 board from Digilent. The inputs will be mapped to the switches on the bottom of the board. Two tactile switches will be used for the Reset and Write functions. The output will be displayed on the board's 7 segment display.

The computer will be broken down into smaller circuits (modules) that handle different operations. Each module will be explained in detail in the following steps.

Materials

Basys3.png

All that is needed for this project is the Basys3 FPGA board from Digilent and a micro USB wire to connect the board to your computer.

Block Diagram of Circuit Modules

LOL (9).png
pasted image 0.png
pasted image 0 (1).png
ramMUX.jpg
ramModule.jpg
addressROM.jpg
ringCounter.jpg
preCounter.jpg
controlROM.jpg
ALU.jpg
condJump.jpg
binToBCD.jpg
driver.jpg
decoder.jpg
fourDigDisplay.jpg
outputMUX.jpg
clockDivider.jpg
triStateBuff.jpg
tenBitReg.jpg
fiveBitReg.jpg

The block diagrams above shows the different circuits modules that make up the 10-bit computer. Below are descriptions for each of the individual parts/modules shown in the diagrams above.

Program Counter

  • Description of Inputs: input is a 5 bit input for loading a number into the program counter. Cp when high the counter counts on falling clock edges. Clr resets counter to 0. Ep when high the counter outputs the current count. Sp when high the counter sets the count to the number on input.
  • Description of Outputs:

    output is a copy of count for use on LEDS 0-15. Count outputs the current count.

  • Overall Place in System: This counter keeps track of the memory location that the program is in. All programs start at memory address 00000 (0) and go up to 11111 (31), unless a halt is used. In jump statements, the program counter continues to count from the address that the program is jumping to.

Input MUX

  • Description of Inputs: Address takes the input from switches 11 through 15. MAR takes the input from the 10 bit register used as a MAR. Program controls which input to route to output.
  • Description of Outputs: output routes the selected input to the RAM.
  • Overall Place in System: This MUX determines whether to route the address from the switches or the bus to the RAM. In program mode the address from the switches is routed and in run mode the address from the bus is routed.

ramMUX

  • Description of Inputs: userInput is the input that the user enters during the program mode. aRegInput is the data contained in the A register, this is used during a move operation. control is the select for this MUX.
  • Description of Outputs: output is the 10-bit data input to the RAM.
  • Overall Place in System: This MUX outputs the 10-bit input data that is used in the RAM module. When the control bit is high, the MUX outputs the data that the user entered in program mode. When the control bit is low, the MUX outputs the data on the control bus.

ramModule

  • Description of Inputs: inputData is the data being stored in the RAM. inputAddress is the location where the data is being stored. program indicates if the computer is in program or run mode. readWrite indicates whether a read or write operation is occurring. notCE is the control bit for the RAM module. move indicates that a move operation is being performed.
  • Description of Outputs: outputDataToBus is the data that goes from the RAM to the bus. outputData and output Address are the data and address that go to the instruction register.
  • Overall Place in System: The RAM allows for program and data storage in memory before a program run. Once the program is running, the RAM receives an address from the MAR and outputs the data at that address to the bus.

addressROM

  • Description of Inputs: opCode is the input containing the address of the opcode that is being performed by the computer
  • Description of Outputs: opCodeStart is the memory address that indicates the first micro-instruction location of the corresponding opCode.
  • Overall Place in System: This module takes the latched micro-instruction and outputs the memory location that corresponds to the start of that micro-instruction sequence.

ringCounter

  • Description of Inputs: reset sets the counter back to 100000 (the first "T state"). Clk increments the counter by one on a falling clock edge. NOP indicates that the current state/cycle is a "no operation" cycle.
  • Description of Outputs: count is the output of the counter.
  • Overall Place in System: The ring counter controls the pre-settable counter and delineates the six micro-steps in each instruction cycle (T1-T6).

preCounter

  • Description of Inputs: opCodeStart is the memory location of the micro-instructions for the opCode being carried out. T1 resets the counter to 0 when it's high. When T3 is high, opCodeStart is loaded and the count continues from that location for the remaining 3 cycles (T4-T6). Clr sets counter to 0. Clk increments counter by one on a falling edge.
  • Description of Outputs: controlWordLocation outputs the memory location of the control word to be executed.
  • Overall Place in System: Each op-code has 3 micro-instructions. The counter increments by 1 starting at 0 for the first 3 cycles (fetch cycle). The counter then is triggered by the ring counter to load the address on opCodeStart and increments by 1 for the remaining 3 cycles. In this way the preCounter controls the sequence of micro-instructions to be carried out.

controlROM

  • Description of Inputs: controlWordLocation is the address of the controlWord that the controlROM will output. NOP indicates that the location is a "no operation" location.
  • Description of Outputs: controlWord is the control word that enables/disables the different computer modules to carry out a desired operation.
  • Overall Place in System: This module decodes the memory location from the preCounter and outputs the controlWord for the desired operation.

ALU

  • Description of Inputs: A and B are the inputs from Register A and Register B which the ALU performs the arithmetic and logic operations on. When subtract is active, it indicates that B is being subtracted from A.
  • Description of Outputs: result is the result of adding A and B, or subtracting B from A. The outputs greaterThan, lessThan, and equalTo indicate if (AB, or A=B) and are used in the conditional jump module. error indicates an overflow or underflow when active.
  • Overall Place in System: The ALU contains the logic for the arithmetic and logic operations carried out by the computer. This module can add and subtract two 10-bit binary numbers. The ALU can also determine if A>B, A

conditionalJmp

  • Descriptoin of Inputs: inputCount is used to latch the current count. inputAddress is used to latch the address that would be jumped to. loadFromRegister when low latches inputAddress. loadCount when low latches inputCount. when outputEnable is low the output is set to the address to jump to.gT, iT, and eQ determine which condition is being checked. greaterThan, lessThan, and equalTo are the inputs from the ALU indicating the result of the comparison between A and B. On the rising clock edge of Clk the inputCount and inputAddress are read into registers.
  • Description of Outputs: outputJmp is the address that the program counter will read in.
  • Overall Place in the System: this module handles conditional and non-conditional jumps for the computer. Based on the inputs gT, iT, and eQ, the module determines which condition to check for and whether that condition is true or false. If the condition is true, it will output the address of the instruction to jump to, otherwise, it outputs the count of the next instruction.

binToBCD

  • Description of Inputs: number the 10 bit number to convert to binary coded decimal.
  • Description of Outputs: hundreds the digit in the hundreds place of the binary number. tens the digit in the tens place of the binary number. ones the digit in the ones place of the binary number.
  • Overall Place in System: This module converts the 10 bit number from the output register to BCD in order for our four digit display driver to display the number in decimal on the 7 segment display.

fourDigitDriver

  • Description of Inputs: number is the 16 bit binary input that is driven to the decoder. inClk is the Basys boards internal clock and is used for a clock divider. RST resets the clock used to drive the digits.
  • Description of Outputs: anode determines which digit place will be illuminated. digit is the input number to the decoder.
  • Overall Place in System: This module drives the decoder to output the BCD number to the display.

decoder

  • Description of Inputs: inputNumber is the digit that comes from the driver and which will be decoded.
  • Description of Outputs: cathodes determines which cathodes will be turned on to display the desired digit.
  • Overall Place in System: This module decodes the digit that is to be displayed on the 7 segment display.

fourDigitDisplay

  • Description of inputs: number is the number to be displayed on the 7 segment display. error indicates when the display should read "Err". Clk is the clock signal that the display is running on. This signal has to be around 60 Hz so that the display can show all 4 digit places simultaneously.
  • Description of Outputs: anode determines which digit place is enabled. cathode determines which cathodes are activated to display the desired digit.
  • Overall Place in System: This module displays a number on the 7 segment display. Refer to the Basys 3 board instruction manual for information on which cathodes and anodes activate to use the display. When the error bit is high, the display shows "Err".

outputMUX

  • Description of Inputs: progModeInput determines which led's are turned on during the programming mode. runModeInput determines which led's are turned on during the run mode. modeSelect is the select or control bit for the MUX.
  • Description of Outputs: ledOutput indicates which led's will be turned on.
  • Overall Place in System: Depending on the mode that the computer is in (program or rum), the MUX will turn on different led's. In program mode (modeSelect is '0'), the MUX turns on led's to resemble the memory location that the computer is in and what it contains. In run mode (modeSelect is '1'), the MUX is used for debugging but can be set to display anything else.

clockDivider

  • Description of Inputs:stop reads the five MSB bits from the bus to detect a halt command ('11111') and stops the clock. inputClk is the internal clock signal of the Basys 3 board.
  • Description of Outputs: ouputClk is the new clock that has been slowed down.
  • Overall Place in System: This clock is used to slow down the computer to make it possible for the user to determine what is going on. The clock can run much faster, however, it is currently set to 2 Hz.

triStateBuffer

  • Description of Inputs: Din is the 5 bit input going into the buffer. Ep is the control bit.
  • Description of Outputs: Dout is the 5 bit output of the buffer
  • Overall Place in System: When the control bit Ep is active, the buffer outputs the input. When the control bit is not active, the buffer doesn't output anything.

tenBitDRegister

  • Description of Inputs: Dbus is the input that the register is to. Clk allows the register to read in data on a rising clock edge. ARST sets the register to 0 asynchronously. When outputEnable is low, the contents of the register are the output. When readIn is low, the register latches Dbus on the rising clock edge.
  • Description of Outputs: Qbus is the output of the register
  • Overall Place in System: The register is used multiple times throughout the computer and is used to store information when performing operations.

fiveBitDRegister

  • Description of Inputs: Dbus is the input that the register is to. Clk allows the register to read in data on a rising clock edge. ARST sets the register to 0 asynchronously. When outputEnable is low, the contents of the register are the output. When readIn is low, the register latches Dbus on the rising clock edge.
  • Description of Outputs: Qbus is the output of the register.
  • Overall Place in System: The register is used multiple times throughout the computer and is used to store information when performing operations.

Code

Below is a folder containing the constraint and source files for the 10-bit computer.

Demo and Sample Code

CPE 133 project - 10 bit computer

The video above demonstrates how to program the 10-bit computer on the Basys 3 FPGA board. A pdf containing the op-codes and a sample program is also attached below.