Stacks - A16-Bit Breadboard Processor

Project to simulate, design, and build a 16-bit breadboard computer. The breadboards are installed in a 3-layer plastic enclosure for circuit stabilization and protection. I designed my own hardware architecture and instruction set architecture (ISA) loosely based on RISC-V. The design includes an Arduino NANO interface to download compiled assembler code to breadboard program RAM (goal). This project is a follow-on to an 8-bit breadboard ala Ben Eater (eater.net) or similar.

Circuit simulator: Digital by hneeman (https://github.com/hneemann/Digital)

Breadboard layout simulator: Fritzing (https://fritzing.org/)

TL866 II+ EEPROM Programmer with XGPro software

Parts list (Bill of Materials)

What is logical circuit simulation? It is simulation with ideal digital components to simulate the "behavior" of the computer. For example, the Arithmetic Logic Unit (ALU) is simulated with an ideal adder, subtractor, AND, OR, XOR, shift left, shift right, rotate left, rotate right, etc. Files for the Logical Simulation can be found on Github at https://github.com/rcrist/Stacks-16-Bit_Breadboard_Processor.git.

What is a physical circuit simulation? It is a simulation with models for physical devices. During this phase, actual discrete devices are selected and interconnected in the simulator to verify computer performance. The simulator circuits can be used as a schematic to build the breadboard computer. Digital was chosen for this project because it had more physical component models than other simulators such as Logisim-Evolution. Files for the Physical Simulation can be found on Github at https://github.com/rcrist/Stacks-16-Bit_Breadboard_Processor.git.

Due to the complexity of this project, the three layers were modeled using Fritzing to layout the breadboards on the acrylic layers. It was also used to layout the components on the breadboards to determine the number of breadboards required. During this process, the number of layers grew from two to three layers due to the complexity of the circuits.

The three acrylic layers are 12" x 12" x 3/16" with mounting holes drilled 0.5" from each corner. Breadboards adhere to the acrylic when the backside paper is peeled off. Several breadboards extend beyond the edges of the acrylic like a "diving board" to allow layer to layer interconnects for the data bus, instruction bus, ALU output bus, power, clocks, and control bus signals. The layer stack is constructed with standoffs (1 & 1/2") between layers and (1/2") below the bottom layer. A clear acrylic 12" x 12" x 1/16" caps the stack to protect the top layer.

The breadboard instruction set architecture has 26 commands generated by the instruction decoder using an 8-Bit opcode and 2 register decoders. The control bus can support up to 32 control signals. The output decoder converts the 16-bit binary code in the output register to hex on the 4-digit 7-segment display. Programs are stored in the program memory RAM downloaded through the Arduino Nano interface to a PC.

The hardware design for the PC interface using an Arduino NANO is complete. TODO: Write a simple assembler to convert assembler commands to hex code. TODO: Write a simple sketch for the arduino to download the hex code to the program memory. TODO: Test multiple programs running on the 16-Bit Breadboard.