Phase-Locked Loop (PLL) Synthesizer

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Phase-Locked Loop (PLL) Synthesizer

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What is a phase-locked loop (PLL)?

A phase-locked loop (PLL) is an electronic circuit with a voltage or voltage-driven oscillator that constantly adjusts to match the frequency of an input signal. PLLs are used to generate, stabilize, modulate, demodulate, filter, or recover a signal from a "noisy" communications channel where data has been interrupted.

PLLs are widely used in wireless or radio frequency (RF) applications, including Wi-Fi routers, broadcast radios, walkie-talkie radios, televisions, and mobile phones.

At its simplest, a phase-locked loop is a closed-loop feedback control circuit that's both frequency- and phase-sensitive. A PLL is not a single component, but a system that consists of both analog and digital components -- interconnected in a "negative feedback" configuration. Consider it analogous to an elaborate operational amp (op-amp)--based amplifier circuit.

What is a phase-locked loop used for?

The main goal of a PLL is to synchronize the output oscillator signal with a reference signal. Even if the two signals have the same frequency, their peaks and troughs may not occur in the same place. Simply put, they do not reach the same point on the waveform at the same time.

Known as the phase differencethis is measured as the angle between the signals. For signals with varying frequencies, the phase difference between them will always vary, which means that one signal will lag or lead the other by a varying amount.

A PLL reduces phase errors between output and input frequencies. When the phase difference between these signals is zero, the system is said to be "locked." This locking action depends on the PLL's ability to provide negative feedback -- i.e., route the output signal back to the phase detector.

In addition to synchronizing the output and input frequencies, a PLL also helps establish the input-output phase relationship to generate the appropriate control voltage. Therefore, it helps achieve both frequency and phase lock in a circuit.

2. in this project I used three different TV tuners

1.The SN761662 is a low-phase-noise synthesized

tuner IC designed for digital TV tuning systems. The

circuit consists of a PLL synthesizer, three-band local

oscillator and mixer, 30-V output tuning amplifier, four

NPN band-switch drivers, and is available in a

small-outline package. A 15-bit programmable

counter and reference divider are controlled by I2C

bus protocol. Tuning step frequency is selectable by

this reference divider ratio for a crystal oscillator.

2. The TDA6508A This device is a programmable 3-band mixer oscillator and

synthesizer intended for LOW, MID, and HIGH band TV

and VCR tuners. It has three double-balanced mixers and

three oscillators for the LOW, MID, and HIGH band

respectively, a PLL synthesizer, and an IF amplifier.

3. The TUA 6039F-2, TUA 6037F device combines a mixer-oscillator function and an IF

AGC amplifier with a digitally programmable phase locked loop (PLL) for use in analog

and digital terrestrial applications.

Supplies

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1.SN761662 DTV Tuner consist of a PLL synthesizer, three-band local oscillator and mixer with a digitally programmable phase locked loop (PLL) for digital tv tuning systems.

2.TDA6508A 3-band mixer/oscillator and synthesizer with a digitally programmable phase locked loop (PLL) for terrestrial tuners.

3.The TUA 6039F-2, device combines a mixer-oscillator function and an IF

AGC amplifier with a digitally programmable phase locked loop (PLL) for use in analog

and digital terrestrial applications.

Phase-LOCK LOOP (PLL)

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Phase Locked Loop (PLL) is a fundamental part of radio, wireless and telecommunication technology.

Key components of a phase-locked loop

A PLL consists of three key components:

  • Phase detector (also known as a phase comparator or mixer). It compares the phases of two signals, and generates a voltage according to the phase difference. It multiplies the reference input and the voltage-controlled oscillator output.
  • Voltage-controlled oscillator. Generates a sinusoidal signal, whose frequency closely matches the center frequency provided by the low-pass filter.
  • Low-pass filter. A kind of loop filter that attenuates the high-frequency alternating current (AC) component of the input signal to smoothen and flatten the signal to make it more DC-like.
  • 15-bit programmable divider
  • Programmable reference divider ratio (64,80,128)
  • Programmable charge-pump current(20 or 100 UA)

How a phase-locked loop works

The underlying mechanism of a PLL operates based on the phase difference between two signals. It detects this difference, and provides a feedback mechanism to modify the voltage-controlled oscillator frequency.

The PLL compares the voltage-controlled oscillator signal with the input/reference signal. Because the PLL is both frequency- and phase-sensitive, it can detect both frequency and phase differences between the two signals.

  • It generates an error signal that corresponds to the phase difference between the signals. This difference is passed on to the low-pass filter that removes any high-frequency elements, and filters the error signal into a varying direct current (DC) level. This "feedback signal" is then applied back to the voltage-controlled oscillator to control its frequency.

To start, this loop will be out of lock. The error signal will pull the voltage-controlled oscillator frequency toward the reference frequency, and continue to do so until it cannot reduce the error any further. At one point, however, the phase difference between the two signals will become zero (i.e., they will both be on exactly the same frequency).

This is when the loop is said to be locked, and a steady-state error voltage is produced.

Frequency Modulation Demodulation Synthesis

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Frequency modulation synthesis (or FM synthesis) is a form of sound synthesis whereby the frequency of a waveform is changed by modulating its frequency with a modulator. The frequency of an oscillator is altered "in accordance with the amplitude of a modulating signal"

FM synthesis can create both harmonic and inharmonic sounds. To synthesize harmonic sounds, the modulating signal must have a harmonic relationship to the original carrier signal. As the amount of frequency modulation increases, the sound grows progressively complex. Through the use of modulators with frequencies that are non-integer multiples of the carrier signal (i.e. inharmonic), inharmonic bell-like and percussive spectra can be created.

FM synthesis using analog oscillators may result in pitch instability. However, FM synthesis can also be implemented digitally, which is more stable and became standard practice. Digital FM synthesis (implemented as phase modulation)

FM demodulation

FM demodulation namely the frequency feedback (FMFB) and the phase locked loop (PLL) systems can be considered as variations of FM detection system using tracking filters. The fact that FM signals can be demodulated by such systems shows that the energy of the FM wave is concentrated in a narrow band around the instantaneous frequency. The purpose of this paper is to show that such a system configuration for FM detection arises naturally from the phase-plane study of the forced behaviour of a quasi-linear second-order differential equation to narrow band signals bearing amplitude and/or phase modulation. A nonlinear filter is synthesized which is designed to offer wide bandwidth to phase modulation vis-a-vis amplitude modulation. The filtering scheme is simulated on the digital computer and the desired behaviour verified by observing the response to a step change in phase and amplitude of the input sinusoidal signal.

Electromagnetic Spectrum

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The electromagnetic spectrum is the range of frequencies (the spectrum) of electromagnetic radiation and their respective wavelengths and photon energies.

The electromagnetic spectrum covers electromagnetic waves with frequencies ranging from below one hertz to above 1025 hertz, corresponding to wavelengths from thousands of kilometers down to a fraction of the size of an atomic nucleus. This frequency range is divided into separate bands, and the electromagnetic waves within each frequency band are called by different names; beginning at the low frequency (long wavelength) end of the spectrum these are: radio waves, microwaves, infrared, visible light, ultraviolet, X-rays, and gamma rays at the high-frequency (short wavelength) end. The electromagnetic waves in each of these bands have different characteristics, such as how they are produced, how they interact with matter, and their practical applications. There is no known limit for long and short wavelengths. Extreme ultraviolet, soft X-rays, hard X-rays and gamma rays are classified as ionizing radiation because their photons have enough energy to ionize atoms, causing chemical reactions. Exposure to ionizing radiation can be a health hazard, causing radiation sickness, DNA damage and cancer. Radiation of visible light and longer wavelengths are classified as nonionizing radiation because they have insufficient energy to cause these effects.

TV channel frequencies

. It includes VHF and UHF frequencies from

channel # 2 to channel # 69.

TV channel frequencies are assigned in 54 to 806 MHz RF frequency band. These total spectrum is divided into 68 TV channels.

Each channel occupies 6MHz bandwidth.

To calculate picture carrier value, add 1.25MHz to the lower frequency range.

To derive sound carrier value, add 4.5 MHz to the picture carrier obtained.

For example, for channel no. 6 which has band from 82 to 88MHz.

Picture carrier = 82 + 1.25 = 83.25 MHz

Sound carrier = 83.25 + 4.5 = 87.75 MHz

  • channel-2 54-60MHZ
  • channel-3 60-66MHZ
  • channel-4 66-72MHZ
  • channel-5 76-82MHZ
  • channel-6 82-88MHZ
  • FM broadcast 88-108MHZ
  • Aircraft 118-135MHZ
  • Ham radio 144-148MHZ
  • Mobile or marine 150-173MHZ
  • channel-7 174-180MHZ
  • channel-8 180-186MHZ
  • channel-9 186-192MHZ
  • channel-10 192-198MHZ
  • channel-11 198-204MHZ
  • channel-12 204-210MHZ
  • channel-13 210-216MHZ
  • channel-14 470-476MHZ
  • channel-15 476-482MHZ
  • channel-16 482-488MHZ
  • channel-17 488-494MHZ
  • channel-18 494-500MHZ

.and so on to .Channel 69 806-902MHZ

Which band is used in TV broadcasting?

TV broadcasting bands are :

  • Band I or known as VHF-LO (54 to 88 MHZ)
  • Band II or known as VHF-HI (174 to 216 MHZ)
  • Band III or known as UHF (470 to 806 MHZ)

.Each channel is spaced by 6MHZ for tv broadcast

.For FM radio it get 100 channels, each channel is spaced by 200KHZ

Programming the SN761662DBTR Digital TV Tuner

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The SN761662 is a low-phase-noise synthesized

tuner IC designed for digital TV tuning systems. The

circuit consists of a PLL synthesizer, three-band local

oscillator, and mixer, 30-V output tuning amplifier, four

NPN band-switch drivers, and is available in a

small-outline package. A 15-bit programmable

counter and reference divider are controlled by I2C

bus protocol. Tuning step frequency is selectable.


The first byte (ADB) is for the slave address

The second byte (DB1) is for the programmable divider bits.

The third byte (DB2) is for the programmable divider bits.

The fourth byte (CB1) is for the charge-pump current control the reference divider ratio and the weak signal booster control.

The fifth byte (BB) is for the band switch.

The six bytes (CB2) are for the RF AGC start point.

Example I2C Data Write Sequences

Telegram examples:

Start-ADB-DB1-DB2-CB1-BB-CB2-Stop

Start-ADB-DB1-DB2-Stop

Start-ADB-CB1-BB-CB2-Stop

Start-ADB-CB1-BB-Stop

Start-ADB-CB2-Stop

Abbreviations:

ADB: Address byte

BB: Band-switch byte

CB1: Control byte 1

CB2: Control byte 2

DB1: Divider byte 1

DB2: Divider byte 2

Start: Start condition

Stop: Stop condition

For the SN761662 DTV tuner, I2C-bus, Six data bytes are required to program the device fully

.Example:

.If we need to tune to channel number 27

S = START, A = acknowledge, and P = STOP. The sequence is as follows:

START + address byte + divider byte 1 + divider byte 2 + control byte + band switch byte + Test bits/XTALOUT control STOP.

1. The first byte is the device address, (ADB)0b11000000 or 0xC0 in the datasheet, but because of the I2C library in Arduino the address gets shifted so it will be 0x60 Wire.beginTransmission(0x60);

2. The second byte(DB1) is the programmable divider, 16348+8192+4096+2048+1024+512+256

 Wire.write(0x2B); the first (DB1) it will be 0b00101011 or 0x2B

3. The third byte(DB2) is the programmable divider,128+64+32+16+8+4+2+1+0

uint16_t data =11080; fpd = data; Wire.write(fpd & 0x00FF);

11080 to binary =0b0010101101001000 = the second (BD2) it will be 0b01001000 or 0x48

4. The fourth byte is the control byte:

.bit numbers 1 2 and 3 are for reference divider ratio (RS0, RS1,RS2)

, bit numbers 4 5, and 6 for RF AGC Start point

.bit numbers 7 and 8 for charge-pump current

In my case, I set the RS0=0 RS1=1, and RS2=0 and the reference divider ratio set to 80 which means it will divide the Crystal oscillator frequency or externally sourced reference frequency of 4 MHz at pin XTAL_REF 4000000 / 80 = 50000 KHZ

5. The fifth byte is for band switch

  • bit BS1 enables port P0 (20 mA drain current) and the LOW band mixer/oscillator
  • bit BS2 enables port P1 (20 mA drain current) and the MID band mixer/oscillator
  • when BS1 and BS2 are both set to 0 (disabled) the HIGH band mixer/oscillator is enabled
  • bit p2 enables port p2 general use
  • bit p3 enables port p3 general use
  • bit p4 enables port p4 ADC use

6. The byte number six is for Test bits/XTALOUT control

.as you can see the (DB1)=0b00101010, and (DB2)=0b01001000,

.and (BS1, BS2)=1 MID band Mixer/oscillator is selected

. for Channel 27 RF = 554MHZ


Fref and Fdiv going into phase detector will tune to channel #27 = 554MHZ

//********************

//The SN761662 PLL

#include <Arduino.h>

#include <Wire.h>

void SNpoweronreset(){

 Wire.beginTransmission(0x60);

  Wire.write(0x00);

 Wire.write(0x00);

 Wire.write(0xC9);

 Wire.write(0x00);

 Wire.write(0x20);

 Wire.endTransmission();

}

void SNTVTuner(uint16_t data ,uint8_t osci){

 uint16_t fpd =0;

 Wire.beginTransmission(0x60);//b01100000 the slave address it get shifted by the I2C

  switch (osci)

 {

  case 1: //setting for oscillator #1 VHF-LO

  fpd = (data+57);

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF);

 Wire.write(0x8B);

 Wire.write(0x31);

  Wire.write(0xE3);

  break;

  case 2: //setting for oscillator #2 VHF-HI

   fpd = (data+57) ;

 Wire.write(fpd >> 8);

  Wire.write(fpd & 0x00FF);

 Wire.write(0x8B);

 Wire.write(0x32);

  Wire.write(0xE3);

  break;

   case 3://Setting for oscillator #3 UHF

 fpd =(data + 57) ;

 Wire.write(fpd >> 8 );

  Wire.write(fpd & 0x00FF );

 Wire.write(0x8B);

 Wire.write(0x38);

  Wire.write(0xE3);

  break;

 }

 Wire.endTransmission();

delay(10);

 

   Wire.requestFrom(0x61,1); //in-lock flag (FL = 1 when the loop is phase-locked)

   while (Wire.available())

   {

int lockst = Wire.read();

   }

}

Programming the TDA6508A Analog TV Tuner

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GENERAL DESCRIPTION

This device is a programmable 3-band mixer oscillator and

synthesizer intended for LOW, MID, and HIGH-band TV

and VCR tuners. It has three double-balanced mixers and

three oscillators for the LOW, MID, and HIGH band

respectively, a PLL synthesizer, and an IF amplifier. There

are four package variants: TDA6508, TDA6509,

TDA6508A and TDA6509A. Versions TDA6508; TDA6509

have a symmetrical IF amplifier; versions TDA6508A;

TDA6509A has an asymmetrical IF amplifier, (see Fig.1).

The common output of all three mixers can be connected,

via two output pins, to an external IF filter to enable

shunted IF bandpass and serial filtering for improved

signal handling. Two input pins are available for

connecting the output of the external filter to the input of

the IF amplifier. The mixer output has an impedance

of 300 W. The IF amplifier input has an impedance

of 2.5 kW (5 pF).

The overall gain of the tuner can be increased at low signal

amplitude conditions to improve TV reception by activating

a weak signal booster via the I2C-bus.

There are five open-drain PMOS output ports; each with a different drive capability. I2C-bus bit P0 enables

port P0 (20 mA drain current) and the LOW band mixer

oscillator. Bit P1 enables port P1 (20 mA drain current)

and the MID band mixer oscillator. When ports P0 and P1

are both disabled, the HIGH band mixer oscillator is

enabled. Bit P2 enables port P2 (20 mA drain current).

Bit P3 enables port P3 (5 mA drain current) for general

use, and bit P4 enables port P4 (5 mA drain current) for

general use, and is also combined with the ADC input.

When the ports are used, the sum of the drain currents

must be limited to 30 mA.

The PLL synthesizer comprises a 15-bit programmable

divider, a crystal oscillator, a programmable reference

divider, a phase comparator (phase/frequency detector)

combined with a charge pump which drives an internal

tuning amplifier and an output at pin CP. The CP signal

current can be integrated by connecting an external RC

loop filter between pin CP and pin VTUNE as shown in

Fig.27. The tuning amplifier can supply up to 33 V (max.)

at pin VT for controlling any of the internal oscillators via

external tank circuits. The phase comparator can operate

at 62.5, 50, or 31.25 kHz with a 4 MHz crystal, depending

on the reference divider ratio of either 64, 80, or 128; see

Table 4. An externally sourced signal having a frequency

between 3.58 MHz and 4.43 MHz can be used as a

reference frequency for the internal crystal oscillator at any

of the reference divider ratios.

In test mode, port P3 will output either half the crystal

reference frequency (1¤2fref) or half the reference divider

frequency (1¤2fdiv); see Table 5.

The device can be controlled according to the I2C bus

format; see Table 1. The in-lock flag bit FL is set to logic 1

when the PLL is locked. This flag is read from the status

byte on pin SDA during a READ operation; see Table 6

and Table 7 in the data sheet.

For the TDA6508A analog TV tuner, I2C-bus, five data bytes are required to program the device fully

.Example:

.If we need to tune in to FM 101.1 WRR FM radio, the setting for the PLL will be:

S = START, A = acknowledge, and P = STOP. The sequence is as follows:

START + address byte + divider byte 1 + divider byte 2 + control byte + band switch byte + STOP.

1. The first byte is the device address, (ADB)0b11000010 or 0xC2 in the datasheet, but because of the I2C library in Arduino the address gets shifted so it will be 0x61 Wire.beginTransmission(0x61);

2. The second byte(DB1) is the programmable divider,16348+8192+4096+2048+1024+512+256

uint16_t data =2022; fpd = data; Wire.write(fpd >> 8); 2022 to binary =0b0000011111100110 >>8 = the first (DB1) it will be 0b00000111 or 0x07

3. The third byte(DB2) is the programmable divider128+64+32+16+8+4+2+1+0,

uint16_t data =2022; fpd = data; Wire.write(fpd & 0x00FF);

2022 to binary =0b0000011111100110 & 0x00FF = the second (BD2) it will be 0b11100110 or 0xE6

4. The fourth byte is the control byte:

  • bit number 1 is for weak signal booster control

0: normal mode - no gain increase: external IF filter used

1: Weak Signal Booster activated: IF filter by-passed

  • bit numbers 2 and 3 are for reference divider ratio (RSA, RSB)

In my case, I set the RSA =0 and RSB =0 the reference divider ratio set to 80 which means it will divide the Crystal oscillator frequency or externally sourced reference frequency of 4 MHz at pin XTAL_REF 4000000 / 80 = 50000 KHZ

5. The fifth byte is for band switch

  • bit p0 enables port P0 (20 mA drain current) and the LOW band mixer/oscillator
  • bit p1 enables port P1 (20 mA drain current) and the MID band mixer/oscillator
  • when p0 and p1 are both set to 0 (disabled) the HIGH band mixer/oscillator is enabled
  • bit p2 enables port p2 general use
  • bit p3 enables port p3 general use
  • bit p4 enables port p4 ADC use

.as you can see the (DB1)=0b00000111, and (DB2)=0b11100110,


Fref and Fdiv going into the phase comparator will tune to channel 101.1 FM WRR classical music channel.

#include <Arduino.h>

#include <Wire.h>

void TDApoweronreset(){

 Wire.beginTransmission(0x61);

 Wire.write(0x00);

 Wire.write(0x00);

 Wire.write(0xC8);

 Wire.write(0x00);

 Wire.endTransmission();

}

void TDATVtuner(uint16_t data,uint8_t osci){

 uint16_t fpd =0;

 Wire.beginTransmission(0x61);

 switch (osci)

 {

 case 1 : //Setting for oscillator #1 VHF-LO

 fpd = (data + 107) ;

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF );

 Wire.write(0xc0);

 Wire.write(0x01);

  break;

 case 2://Setting for oscillator #2 VHF-HI

 fpd = (data+107) ;

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF);

 Wire.write(0xc0);

 Wire.write(0x02);

  break;

case 3://Setting for oscillator #3 UHF

 fpd = (data+107) ;

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF);

 Wire.write(0xc0);

 Wire.write(0x00);

  break;

 }

 Wire.endTransmission();

delay(10);

 

   Wire.requestFrom(0x61,1); //in-lock flag (FL = 1 when the loop is phase-locked)

   while (Wire.available())

   {

int lockst = Wire.read();

   }

}

Programming the TUA6039F Digital and Analog TV Tuner

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The TUA 6039F-2, TUA 6037F ’OmniTune™TUA 6039F-2, OmniTune™TUA 6037F’

the device combines a mixer-oscillator block with a digitally programmable phase-locked

loop (PLL) and a variable gain IF AGC amplifier for use in TV and VCR tuners, set-top box

and mobile applications. Integrated narrow-band RF AGC functions with output

buffer is provided.

The mixer-oscillator block includes three balanced mixers (one mixer with an

unbalanced high-impedance input and two mixers with a balanced low-impedance

input), two 2-pin asymmetrical oscillators for the LOW and the MID band, and one 4-pin

symmetrical oscillator for the HIGH band, a reference voltage, and a band switch. The

mixer output signal passes a SAW filter driver and an IF AGC amplifier to provide

constant output level ready for A/D sampling.

The PLL block with four-pin programmable chip addresses forms a digitally

programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise

setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25,

50, 62.5, 125, 142.86 or 166.7 kHz. A microprocessor controls the tuning process

via an I2C bus. A flag is set when the loop is locked. The lock flag can be read by the

processor via the I2C bus. The device has 5 output ports and an X_TAL output buffer. One

of the ports (P4) can also be used as input for a 5-level A to D converter (only available

in TUA 6039F-2).

.PLL

• 4 pin-programmable I2C addresses

• I2C bus protocol compatible with 3.3 V and 5 V micro-controllers up to 400 kHz

• High voltage VCO tuning output

• 4 PNP ports

• 1 NPN port/ADC input1)

• Power down mode

• Internal LOW/MID/HIGH band switch

• Lock-in flag

• 6 programmable reference divider ratios (24, 28, 32, 64, 80, 128)

• 4 programmable charge pump currents

For the TUA6039F DTV tuner, I2C-bus, Six data bytes are required to fully program the device

.Example:

.If we need to tune in to FM 101.1 WRR FM radio, the setting for the PLL will be:

S = START, A = acknowledge, and P = STOP. The sequence is as follows:

START + address byte + divider byte 1 + divider byte 2 + control byte + band switch byte + Auxiliary+ STOP.

1. The first byte is the device address, (ADB)0b11000010 or 0xC2 in the datasheet, but because of the I2C library in Arduino the address gets shifted so it will be 0x61 Wire.beginTransmission(0x61);

2. The second byte(DB1) is the programmable divider, 16348+8192+4096+2048+1024+512+256

uint16_t data =1818; fpd = data;  Wire.write(fpd >> 8);

1818 to binary =0b0000011100011010 >>8 = the first (DB1) it will be 0b00000111 or 0x07

3. The third byte(DB2) is the programmable divider,128+64+32+16+8+4+2+1+0

uint16_t data =1818; fpd = data;  Wire.write(fpd & 0x00FF);

1818 to binary =0b0000011100011010 & 0x00FF = the second (BD2) it will be 0b00011010 or 0x1A

4. The fourth byte is the control byte:

  • bit number 1 is for tuning amplifier control

0: normal mode - no gain increase: external IF filter used

1: Weak Signal Booster activated: IF filter by-passed

  • bit numbers 2 and 3 are for reference divider ratio (RSA, RSB)

In my case, I set the RSA =0 and RSB =0 the reference divider ratio set to 80 which means it will divide the Crystal oscillator frequency or externally sourced reference frequency of 4 MHz at pin XTAL_REF 4000000 / 80 = 50000 KHZ

  • bit 4 5 and 6 are for test bit
  • bit 6 7 and 8 for charge pump control

5. The fifth byte is for band switch

  • bit p0 enables port P0 and the LOW band mixer/oscillator
  • bit p1 enables port P1 and the MID band mixer/oscillator
  • when p0 and p1 are both set to 0 (disabled) the HIGH band mixer/oscillator is enabled
  • bit p2 enables port p2 general use
  • bit p3 enables port p3 general use
  • bit p4 enables port p4 ADC use

6. the byte number six is for Auxiliary

.as you can see the (DB1)=0b00000111, and (DB2)=0b00011010



Fref and Fdiv going into the phase comparator will tune to channel 90.9 KCBI FM radio channel.

#include <Arduino.h>

#include <Wire.h>

void TUApoweronreset(){

 Wire.beginTransmission(0x61);

 Wire.write(0x00);

 Wire.write(0x00);

 Wire.write(0xC9);

 Wire.write(0x00);

 Wire.write(0x20);

 Wire.endTransmission();

}

void TUATVtuner(uint16_t data,uint8_t osci){

 uint16_t fpd =0;

 Wire.beginTransmission(0x61);

 switch (osci)

 {

 case 1 ://Setting for oscillator #1 VHF-LO

 fpd = (data + 107);

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF);

 Wire.write(0xc0);

 Wire.write(0x01);

 Wire.write(0x81);

  break;

 case 2://Setting for oscillator #2 VHF-HI

 fpd = (data + 107);

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF);

 Wire.write(0xc0);

 Wire.write(0x11);

  Wire.write(0x81);

 break;

case 3://Setting for oscillator #3 UHF

 fpd = (data + 107);

 Wire.write(fpd >> 8);

 Wire.write(fpd & 0x00FF);

 Wire.write(0xc0);

 Wire.write(0x00);

  Wire.write(0x81);

  break;

 }

 Wire.endTransmission();

delay(10);

 

   Wire.requestFrom(0x61,1); //in-lock flag (FL = 1 when the loop is phase-locked)

   while (Wire.available())

   {

int lockst = Wire.read();

   }

}

The Use of This Project

TV tuner as FM radio tuner 2
SIFBoard.jpg
20221116_024945.jpg
VideoSwitchBoard.jpg
VideoOutput.jpg
IRreciverboard.jpg
20221116_025637.jpg
20221116_025707.jpg
20221116_025715.jpg
CVBSOUTPUT.jpg
audioswitch.jpg

.I did manage to tune the DTV tuner for the digital tv broadcast throw I2C using Arduino Nano and I did tune the analog tv tuner for FM radio broadcast and to receive from Sony transmitter it transmit at 915 MHZ. and for the third tuner the TUA6037F I did used as Digital tv tuner and analog for FM radio because this tuner it can be used is digital or analog tv tuner.

New Software Drivers for Analog TV Tuner PLL

f osc = f ref * 8 * SF

f osc: Local oscillator frequency

f ref:  Crystal reference frequency / 512 = 4 MHz / 640 = 6.25 kHz

SF: Programmable scaling factor

Scaling factor

SF= 16348* n14 + 8192 * n13 * 4096 * n12 + 2048 * n11 + 1024 * n10 + 512 * n9 + 256* n8 + 128 * n7 + 64 * n6 + 32 * n5 + 16 * n4 + 8 * n3 + 4 * n2 + 2 * n1 + n0

#include <Wire.h>

#include <LiquidCrystal_I2C.h>

#include <Encoder.h>


// I2C device address

#define DEVICE_ADDRESS 0x10


// Reference Divider

#define REFERENCE_DIVIDER 640

// Step Size

#define STEP_SIZE 50000 // 50 kHz


// LCD Configuration

LiquidCrystal_I2C lcd(0x27, 16, 2); // Change the address if needed, and adjust the dimensions


// Rotary Encoder Configuration

Encoder encoder(2, 3); // Adjust the pin numbers based on your setup


// Switch Input Configuration

const int switchPin = 4; // Adjust the pin number based on your setup

bool switchState = LOW;

bool lastSwitchState = LOW;

unsigned long lastSwitchTime = 0;

unsigned long switchDebounceTime = 50; // Adjust the debounce time as needed


// Frequency variables for each band with minimum and maximum values

uint32_t minFrequencyBandI = 54.0e6;

uint32_t maxFrequencyBandI = 88.0e6;

uint32_t rfFrequencyBandI = minFrequencyBandI; // Starting frequency for Band I (VHF-LO)


uint32_t minFrequencyBandII = 174.0e6;

uint32_t maxFrequencyBandII = 216.0e6;

uint32_t rfFrequencyBandII = minFrequencyBandII; // Starting frequency for Band II (VHF-HI)


uint32_t minFrequencyBandIII = 470.0e6;

uint32_t maxFrequencyBandIII = 806.0e6;

uint32_t rfFrequencyBandIII = minFrequencyBandIII; // Starting frequency for Band III (UHF)


uint32_t minFrequencyBandIV = 807.0e6;

uint32_t maxFrequencyBandIV = 1.4e9;

uint32_t rfFrequencyBandIV = minFrequencyBandIV; // Starting frequency for Band IV


uint8_t dividerByte1, dividerByte2;

uint8_t slaveAddress = 0x20; // Replace with your actual slave address

uint8_t controlByte = 0x3C; // Replace with your actual control byte

uint8_t portControlBandI = 0x01; // Port control value for Band I

uint8_t portControlBandII = 0x02; // Port control value for Band II

uint8_t portControlBandIII = 0x03; // Port control value for Band III

uint8_t portControlBandIV = 0x04; // Port control value for Band IV


void setDeviceConfiguration(uint8_t slaveAddress, uint8_t dividerByte1, uint8_t dividerByte2, uint8_t controlByte, uint8_t portControl) {

 Wire.beginTransmission(DEVICE_ADDRESS);

 Wire.write(dividerByte1);

 Wire.write(dividerByte2);

 Wire.write(controlByte);

 Wire.write(portControl);

 Wire.endTransmission();

}


void calculateDividerBytes(uint32_t rfFrequency, uint8_t &dividerByte1, uint8_t &dividerByte2) {

 uint16_t dividerValue = rfFrequency / (REFERENCE_DIVIDER * STEP_SIZE);

 dividerByte1 = (dividerValue >> 8) & 0xFF;

 dividerByte2 = dividerValue & 0xFF;

}


void displayConfigurationOnLCD(uint32_t rfFrequency) {

 lcd.clear();

 lcd.setCursor(0, 0);

 lcd.print("RF Frequency:");


 lcd.setCursor(0, 1);

 lcd.print(rfFrequency / 1e6, 1); // Display frequency in MHz with one decimal place

 lcd.print(" MHz");

}


void switchBand() {

 // Switch to the next band

 if (portControlBandI == 0x01) {

  // Switch from Band I to Band II

  portControlBandI = 0x00;

  portControlBandII = 0x01;

  rfFrequencyBandI = minFrequencyBandII;

  calculateDividerBytes(rfFrequencyBandII, dividerByte1, dividerByte2);

  setDeviceConfiguration(slaveAddress, dividerByte1, dividerByte2, controlByte, portControlBandII);

  displayConfigurationOnLCD(rfFrequencyBandII);

 } else if (portControlBandII == 0x02) {

  // Switch from Band II to Band III

  portControlBandII = 0x00;

  portControlBandIII = 0x01;

  rfFrequencyBandII = minFrequencyBandIII;

  calculateDividerBytes(rfFrequencyBandIII, dividerByte1, dividerByte2);

  setDeviceConfiguration(slaveAddress, dividerByte1, dividerByte2, controlByte, portControlBandIII);

  displayConfigurationOnLCD(rfFrequencyBandIII);

 } else if (portControlBandIII == 0x03) {

  // Switch from Band III to Band IV

  portControlBandIII = 0x00;

  portControlBandIV = 0x01;

  rfFrequencyBandIII = minFrequencyBandIV;

  calculateDividerBytes(rfFrequencyBandIV, dividerByte1, dividerByte2);

  setDeviceConfiguration(slaveAddress, dividerByte1, dividerByte2, controlByte, portControlBandIV);

  displayConfigurationOnLCD(rfFrequencyBandIV);

 } else if (portControlBandIV == 0x04) {

  // Switch from Band IV back to Band I

  portControlBandIV = 0x00;

  portControlBandI = 0x01;

  rfFrequencyBandIV = minFrequencyBandI;

  calculateDividerBytes(rfFrequencyBandI, dividerByte1, dividerByte2);

  setDeviceConfiguration(slaveAddress, dividerByte1, dividerByte2, controlByte, portControlBandI);

  displayConfigurationOnLCD(rfFrequencyBandI);

 }

}




void setup() {

 Wire.begin();

 lcd.begin(16, 2); // Adjust these values based on your LCD module


 pinMode(switchPin, INPUT_PULLUP); // Internal pull-up resistor for the switch


 // Set the initial configuration for Band I (VHF-LO)

 calculateDividerBytes(rfFrequencyBandI, dividerByte1, dividerByte2);

 setDeviceConfiguration(slaveAddress, dividerByte1, dividerByte2, controlByte, portControlBandI);


 // Display the initial configuration on the LCD for Band I

 displayConfigurationOnLCD(rfFrequencyBandI);

}


void loop() {

 static long lastEncoded = 0;

 long encoderValue = encoder.read();


 // Read the switch input and debounce

 int reading = digitalRead(switchPin);

 if (reading != lastSwitchState) {

  lastSwitchTime = millis();

 }


 if ((millis() - lastSwitchTime) > switchDebounceTime) {

  if (reading != switchState) {

   switchState = reading;


   // Toggle between bands on switch press

   if (switchState == HIGH) {

    switchBand();

   }

  }

 }


 if (encoderValue != lastEncoded) {

  // Adjust the frequency based on the encoder rotation (for simplicity, using a fixed step)

  if (encoderValue > lastEncoded) {

   if (rfFrequencyBandI + 0.1e6 <= maxFrequencyBandI) {

    rfFrequencyBandI += 0.1e6; // Increase frequency by 0.1 MHz

   }

  } else {

   if (rfFrequencyBandI - 0.1e6 >= minFrequencyBandI) {

    rfFrequencyBandI -= 0.1e6; // Decrease frequency by 0.1 MHz

   }

  }


  // Calculate new divider bytes and set the device configuration

  calculateDividerBytes(rfFrequencyBandI, dividerByte1, dividerByte2);

  setDeviceConfiguration(slaveAddress, dividerByte1, dividerByte2, controlByte, portControlBandI);


  // Update the LCD display

  displayConfigurationOnLCD(rfFrequencyBandI);


  lastEncoded = encoderValue;

 }


 // Your other loop code, if needed

}