NOT, AND, OR Gates Using NAND Gates

In this instructable, we are going to construct NOT, AND, OR gates using NAND gates only. In the next steps, we will get into boolean algebra and we will derive the NAND-based configurations for the desired gates.

NAND and NOR gates are "universal" gates, and thus any boolean function can be constructed using either NAND or NOR gates only.

Here are two links for the instructables covering the fundamentals of digital logic gates:

1. Digital Logic Gates (Part 1)

2. Digital Logic Gates (Part 2)

Please feel free to post any questions regarding this instructable in the comments section below. Enjoy!

Boolean algebra is a branch of mathematical logic, where the variables are either true (1) or false (0).

In order to construct NOT, AND, OR gates from NAND gates only, we need to be familiar with the following boolean algebra laws:

1. Involution Law

2. Idempotency (Idempotent) law

3. DeMorgan's Law

The three laws are explained in Figure 1.

Also, we are going to use the 74LS00 IC chip to construct the derived NAND-based configurations on a breadboard in order to confirm the results. Note that Pin #7 is connected ground, and Pin #14 is connected to the supply voltage (5V).

Parts needed:
Breadboard

9V battery

Battery connector

5V regulator

IC Chip: 74LS00

One LED (any color)

One 330 Ohm resistor

Wires as needed

The NAND-based derivation of the NOT gate is shown in Figure 1. Also, it is important to note that the inputs of the NAND gates are connected together; the same input. In Figure 2 & 3, the NAND-based configuration was derived, the two possible inputs, zero and one, were tested, and the results were observed. Thus, from the results, we can conclude that inserting the same input through a 2-input NAND gate will result in the compliment of the input; logical negation is implemented which agrees to the truth table of a NOT gate shown in Figure 4.

The NAND-based derivation of the AND gate is shown in Figure 1. For the breadboard part of this step, the blue wire represents Input 1 (A), wire 2 represents Input 2 (B), and the LED represents the final output. Finally, from the results, we can conclude that the derived configuration of the NAND gates is correct and indeed is equivalent to an AND gate because the results agree with the truth table of the AND gate shown in Figure 6.

The NAND-based derivation of the OR gate is shown in Figure 1. For the breadboard part of this step, the blue wire represents Input 1 (A), wire 2 represents Input 2 (B), and the LED represents the final output. Finally, from the results, we can conclude that the derived configuration of the NAND gates is correct and indeed is equivalent to an OR gate, because the results agree with the truth table of the OR gate shown in Figure 6.