Level Shifting Between TTL and CMOS

There are two lines, called logic families,of analog IC's and while they can generally be interoperable "off the shelf," they work best with ICs of the same family and sometimes IC's of mixed logic families can require a voltage translation to get working correctly.  Often, though, our designs will have need to intermix different logic families.  This isn't always a problem when there is no inherent dependency on signaling between the logic IC's, and in some cases even signaling between them won't pose a problem.  However, in some cases, like when signaling between a CMOS IC and a TTL IC, there can be a problem because each logic family defines the valid range of voltage that make up a valid HIGH and valid LOW and the logic families don't agree on the range.

This instructable will briefly explain the two logic families of IC's you will most likely be encountering and using in your circuit designs and how to ensure that the HIGH or LOW output of the other is translated and interpreted correctly between a TTL and CMOS device.  This process is called voltage level shifting and is the subject of this instructable.

Turn the page and read up on the two logic families that you have probably already implemented in your designs.

TTL IC's -- members of the Bipolar Logic Family --  were first developed in the 1960's and are made with transistors, hence the name Transistor-Transistor Level (TTL) device.  The original line were 74xx series and have since been replaced with better performing TTL devices, such as the 74LSxx, 74ALSxx, and 74Fxx series.  The LS is a Low-power Schottky, ALS is an Advanced LS and F is Fast. 

The bipolar logic family, as the TTL series falls under have had consideral improvements, the first being the 74H which provided twice the speed of the original 74xx series, but at a cost of over twice the power consumption.  The next improvement was the74L which increased all the internal resistances, leading to a net improvement in power consumption, but increased the propagation delay.

A key improvement came with the 74S series which placed Schottky diodes across the base-to-collector junctions of the transistors.  Capacitive effects were reduced and yielded a speed increase of a factor of 5 with about a two-times increase in power consumption.  The above mentioned lines 74LSxx were derived from this series and reduced power consumption by about 1/3.  The 74ALSxx improved performance even further.  The 74F series, based on a new technology, reduced the propagation delays and even further reduced the size of the IC.

There was an alternative to TTL IC's being developed at around the same time and these type of IC's were called CMOS (Complementary MOSFET) because of the inclusion and use of a high-impedance MOSFET. The high-impedance of the MOS circuit reduced the power dissipation of the circuit by a significant amount.  These CMOS series were called the 4000 series and had names like 4019 and 4027, etc.

The CMOS line also had a much wider operating voltage range (3V to 18V) and had a specific requirement for the voltage meaning HIGH and LOW, for both input and output to other integrated or digital circuits (which I will cover later).  The 4000 series, while offering greater power requirement reduction, were considerably slower than its TTL counterparts and were particularly susceptible to static discharges and were easily damaged by static electricity. 

Several advances were made in the CMOS line.  The 74Cxx series were made to be pin-for-pin compatible with the TTL IC of the same name (ie 74138 == 74C138).  Also, later was introduced the 74HC and 74HCTxx series of CMOS IC's.  This High-speed CMOS (HC) line was also pin-compatible with the TTL series but still used the same voltage supply and logical voltage setup as the previous CMOS circuits.  The 74HCTxx series were High-Speed CMOS but were voltage-compatible with their TTL counterparts.  Finally, the "Advanced CMOS" 74ACxx series was developed to have a processing speed comparable to the 74F TTL line.

Today, which one you choose is mainly a decision based on availability, cost, and voltage requirements of your design.  However, there are still compatibility issues if you "mix and match" CMOS and TTL ICs because each logic family defined what a HIGH voltage was and what a LOW voltage was, and they are not generally compatible except in a small overlap.  What does this mean for us?  We may get lucky and it means nothing, but for most of us, it means that we have to design in some way to match each of the logic families logic voltage requirements in a process called voltage level shifting, or just level shifting.

Each logic family defines the appropriate threshholds of what it will consider a HIGH or a LOW.  This choice being somewhat arbitrary, they did get it close.  Generally, a LOW is a signal with an amplitude of zero to one volt.  A HIGH varies the most and is the cause of our current level shifting consternation.

The TTL family allows a 2V - 5V difference to be counted as a HIGH and defines the threshold for output for HIGH as 2.7V to 5V.  In the CMOS family, an input wanting to define HIGH must bring between 3.5V and 5V.  But TTL only has to bring 2.7V, leaving a difference of almost a volt that is valid for TTL and invalid for CMOS.  It's when a TTL chip wants to send a HIGH and sources somewhere in that nebulous range that's not valid for CMOS HIGH but is for TTL. 

The answer is to level shift.  This is the act of actively either shifting down or up a signal voltage to match a target IC. The most useful I've found is the shift up to 5V from 3.3V signal.

For unidirectional shifting from 5V to 3.3V, you don't get a much easier and straightforward (as well as cheap) solution as using a zener diode.  Find a zener diode that matches your voltage requirements, two common ones are 1N4733A (5.1V) and 1N5226 (3.3V).  You'll want to match your wattage; these are 0.5W diodes.

By attaching a load resistor inline before the zener diode, and taking the zener to ground, you can ensure that the voltage that gets past the zener is at or slightly below the zener voltage (Vz) of the zener diode.  In the example picture below, you can see that inputting a 5V signal outputs a 3.18V signal. 

In the second example, I'm "regulating" 5.1V after stepping down from 10V.  This isn't to be confused with a constant-current/voltage regulation.  This is best used as a signal with little to no load.

When you have a 3V HIGH input and need to step it up to a 5V HIGH input, nothing beats the cost, ease, and simplicity of using a transistor.  I've included two different circuits using the transistor for your perusal.  Both will step up a 3.3V to about 5V.  You may want to play around with the resistor values to get the transistor you're using to full saturation.

Notice the voltage divider network in the 2nd example.  I've found 10k ohm resistors yield the best value closest to 5V without going over.  Your mileage may vary.

The idea here is to use an IC that is powered at the target voltage as the source for the signal amplitude step up.   In this case, I've used a 4069 Hex Inverter IC.  You could also use a 74HC04 or one of your choosing.  I use two of the inverters (there are six in this IC) to take the signal and step up the output to the Vcc of the IC.  There is no magic in choosing two inverters: they invert, so I wanted my HIGH input to maintain a HIGH output instead of being inverted.

The same idea can be applied to octal and hex line buffers without having to invert and this is useful if you have multiple signal elements that are coming out of an MCU or other logic family IC and are all having the same action applied (ie all being stepped up or stepped down).

The idea here is the same as for the inverter, except we're not inverting our signal.  We use the chip voltage as the Vcc for the output, so you can power it with 3.3V or 5V depending on which chip you use, and the output pin will source at that voltage.  In other words, 3.3V IN = 5V OUT and vice verse.

Some IC options here are 74*241, 74*244, 74*245.  You could also use a 4050 hex non-inverting buffer or any other one of your choosing.  In my example, I use the 4050.

This IC is a CMOS hex voltage-level shifter for TTL-to-CMOS and CMOS-to-CMOS.  From the datasheet:
 

CD4504B hex voltage level-shifter consists of six circuits which shift the input signals from the Vcc logic level to the Vdd logic level.  To shift TTL signals to CMOS logic levels, the SELECT input is at the Vcc HIGH logic state.  When the SELECT input is at a LOW logic state, each circuit translates signals from one CMOS level to another.
 

Check the picture below or check out the datasheet for the pinout.  Essentially, your signal-to-be-shifted may be on A_IN and it will be shifted and put back on A_OUT.  Same for B_IN and B_OUT, etc.
 

Power VL with your lower power IC and VCC with your higher power VCC.

Connect your signals accordingly:

• IVL1 to OVL1
• IVL2 to OVCC2
• IVL3 to OVCC3
• IVL4 to OVCC4

Remember, the pins that start with "I" are input signals that are to be level shifted.  The pins beginning with the letter "O" are output signals that have been level shifted and are ready to be read and/or used.

Try some of these circuits for yourself so that next time you have to think about mixing CMOS and TTL, the thought of level shifting signals doesn't give you a headache.  Sometimes design or economics requires this mixing and it shouldn't be any problem now to intermix these two.

Thanks for reading my instructable.  As always, I look forward to any comments or suggestions you may have regarding this or any of my instructables.

Cheers!
-gian
aka nevdull