FM Radio Using TEA5767 and PIC16F877A Micro-controller
by Jestin_Cubetech in Circuits > Microcontrollers
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FM Radio Using TEA5767 and PIC16F877A Micro-controller
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TEA5767 single-chip FM stereo radio.
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* High sensitivity due to integrated low-noise RF input amplifier
* FM mixer for conversion to IF of the US/Europe (87.5 MHz to 108 MHz) and Japanese
(76 MHz to 91 MHz) FM band
* Preset tuning to receive Japanese TV audio up to 108 MHz
* RF Automatic Gain Control (AGC) circuit
* LC tuner oscillator operating with low cost fixed chip inductors
* FM IF selectivity performed internally
* No external discriminator needed due to fully integrated FM demodulator
* Crystal reference frequency oscillator; the oscillator operates with a 32.768 kHz clock
crystal or with a 13 MHz crystal and with an externally applied 6.5 MHz reference
frequency
* Phase-locked loop (PLL) synthesizer tuning system
* I2C-bus and 3-wire bus, selectable via pin BUSMODE
* 7-bit IF counter output via the bus
* 4-bit level information output via the bus
* Soft mute
* Signal dependent mono to stereo blend [Stereo Noise Cancelling (SNC)]
* Signal dependent High Cut Control (HCC)
* Soft mute, SNC and HCC can be switched off via the bus
* Adjustment-free stereo decoder
* Autonomous search tuning function
* Standby mode
* Two software programmable ports
* Bus enable line to switch the bus input and output lines into 3-state mode
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* High sensitivity due to integrated low-noise RF input amplifier
* FM mixer for conversion to IF of the US/Europe (87.5 MHz to 108 MHz) and Japanese
(76 MHz to 91 MHz) FM band
* Preset tuning to receive Japanese TV audio up to 108 MHz
* RF Automatic Gain Control (AGC) circuit
* LC tuner oscillator operating with low cost fixed chip inductors
* FM IF selectivity performed internally
* No external discriminator needed due to fully integrated FM demodulator
* Crystal reference frequency oscillator; the oscillator operates with a 32.768 kHz clock
crystal or with a 13 MHz crystal and with an externally applied 6.5 MHz reference
frequency
* Phase-locked loop (PLL) synthesizer tuning system
* I2C-bus and 3-wire bus, selectable via pin BUSMODE
* 7-bit IF counter output via the bus
* 4-bit level information output via the bus
* Soft mute
* Signal dependent mono to stereo blend [Stereo Noise Cancelling (SNC)]
* Signal dependent High Cut Control (HCC)
* Soft mute, SNC and HCC can be switched off via the bus
* Adjustment-free stereo decoder
* Autonomous search tuning function
* Standby mode
* Two software programmable ports
* Bus enable line to switch the bus input and output lines into 3-state mode
Simple and Reliable TEA5767 Module Wiring
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Circuit Diagram.
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Prototype - Demo1
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edaboard link : http://www.edaboard.com/thread289529.html#post1266888
Prototype - Demo2
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options:
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1, Manual tuning
2, Auto tuning
3, channel memory [eeprom ]
4, STEREO/MONO Indication
5, Signal Strength Indication
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1, Manual tuning
2, Auto tuning
3, channel memory [eeprom ]
4, STEREO/MONO Indication
5, Signal Strength Indication
Prototype - Demo3
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