Exploring I2C: Essential Communication Protocol Basics

Up to now, we’ve covered the fundamentals of SPI communication and UART communication. Let’s now delve into the last protocol of this series: Inter-Integrated Circuit, or I2C.

You’ll likely encounter I2C when working on projects involving OLED displays, barometric pressure sensors, or gyroscope/accelerometer modules.

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I2C combines the advantageous features of both SPI and UARTs. It allows for the connection of multiple slaves to a single master, akin to SPI, and permits multiple masters to control single or multiple slaves. This flexibility proves highly beneficial in scenarios where multiple microcontrollers need to log data to a single memory card or display text on a single LCD.

Similar to UART communication, I2C utilizes only two wires for data transmission between devices:

• SDA (Serial Data): Used for sending and receiving data between the master and slave.
• SCL (Serial Clock): Carries the clock signal.

I2C operates as a serial communication protocol, transmitting data bit by bit along a single wire (the SDA line).

Like SPI, I2C is synchronous, meaning the output of bits is synchronized with the sampling of bits via a clock signal shared between the master and slave. The master always controls the clock signal.

In I2C communication, data is transmitted in messages, which are composed of data frames. Each message consists of an address frame containing the binary address of the slave and one or more data frames containing the transmitted data. Additionally, the message includes start and stop conditions, read/write bits, and ACK/NACK bits between each data frame:

• Start Condition: The SDA line transitions from a high voltage level to a low voltage level before the SCL line transitions from high to low.
• Stop Condition: The SDA line transitions from a low voltage level to a high voltage level after the SCL line transitions from low to high.
• Address Frame: A 7 or 10-bit sequence unique to each slave, identifying it when the master intends to communicate.
• Read/Write Bit: A single bit indicating whether the master is sending data to the slave (low voltage level) or requesting data from it (high voltage level).
• ACK/NACK Bit: Each frame in a message is followed by an acknowledgment or no-acknowledge bit. An ACK bit is returned to the sender if the address frame or data frame was successfully received by the receiving device.

Addressing

Unlike SPI, I2C doesn’t employ slave select lines, necessitating an alternate method to inform the slave that data is intended for it. This is achieved through addressing. The address frame, always the first frame after the start bit in a new message, contains the address of the intended slave.

The master transmits the address of the slave it wishes to communicate with to every slave connected to it. Each slave compares the master’s address to its own. If there’s a match, the slave sends a low voltage ACK bit to the master; otherwise, it remains inactive, and the SDA line stays high.

Read/Write Bit

The address frame includes a single bit at the end indicating whether the master intends to write data to or receive data from the slave. A low voltage level signifies data transmission from the master to the slave, while a high voltage level indicates data request from the master to the slave.

The Data Frame

Once the master detects the ACK bit from the slave, the first data frame is ready to be sent. Each data frame is 8 bits long and transmitted with the most significant bit first. Following each data frame is an ACK/NACK bit to confirm successful reception. The master or slave, depending on who is sending the data, must receive the ACK bit before sending the next data frame.

Upon transmitting all data frames, the master can send a stop condition to halt the transmission. This stop condition involves a transition from low to high voltage on the SDA line after a low to high transition on the SCL line, with the SCL line remaining high.

• The master initiates the transmission by sending the start condition to every connected slave. This is done by transitioning the SDA line from a high voltage level to a low voltage level before transitioning the SCL line from high to low.
• Next, the master transmits the 7 or 10-bit address of the intended slave along with the read/write bit.
• Upon receiving the address frame, each slave compares it with its own address. If there’s a match, the slave acknowledges by pulling the SDA line low for one bit. If there’s no match, the slave leaves the SDA line high.
• Subsequently, the master proceeds to send or receive the data frame.
• Following the transfer of each data frame, the receiving device returns an additional ACK bit to acknowledge the successful receipt of the frame.
• Finally, to conclude the data transmission, the master sends the stop condition to the slave. This involves transitioning the SCL line high before transitioning the SDA line high.

Due to I2C’s use of addressing, it allows for the control of multiple slaves from a single master. With a 7-bit address, there are 128 (2^7) unique addresses available. Although uncommon, using 10-bit addresses provides 1,024 (2^10) unique addresses. To connect multiple slaves to a single master, wire them as depicted below, with 4.7K Ohm pull-up resistors connecting the SDA and SCL lines to Vcc.

Multiple masters can be connected to a single slave or multiple slaves. However, an issue arises when multiple masters attempt to send or receive data simultaneously over the SDA line. To mitigate this problem, each master needs to detect the state of the SDA line before transmitting a message. If the SDA line is low, indicating another master has control of the bus, the master should wait. If the SDA line is high, it’s safe to transmit the message. To connect multiple masters to multiple slaves, use the provided diagram, with 4.7K Ohm pull-up resistors connecting the SDA and SCL lines to Vcc.

While I2C may seem complex compared to other protocols, there are compelling reasons for and against its use:

Advantages:

• Utilizes only two wires
• Supports multiple masters and multiple slaves
• ACK/NACK bit confirms successful frame transfer
• Hardware setup is less complex than UARTs
• Well-established and widely used protocol

Disadvantages:

• Slower data transfer rate compared to SPI
• Data frame size limited to 8 bits
• More complex hardware implementation than SPI

Thank you for reading! We hope you found this series of articles on electronic communication protocols informative. If you haven’t already, you can read part one covering the SPI communication protocol and part two covering UART-driven communication.

If you have any questions or additional insights, feel free to leave a comment below. And don’t forget to subscribe for more articles like this delivered to your inbox!

Link: Exploring I2C: Essential Communication Protocol Basics