Discrete Operational Amplifier

by Rishabh_Sathe in Circuits > Electronics

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Discrete Operational Amplifier

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Electronics dominantly deal with integrated circuits.

Circuit design is of two types, analog and digital circuit design.

Under analog circuit design, the most fundamental one is the operational amplifier.

Here is a discrete transistor-level replica of the popular IC-741.

Supplies

Materials required:-

1) Transistor 2N3904 (or any other equivalent NPN BJT) X 13.

2) Transistor 2N3906 (or any other equivalent PNP BJT) X 7.

3) Diode BAT85 (or 1N4148) X2.

4) Resistors 1K X 2, 51K X 2, 39K X 1, 7.5K X 1, 24R X 1, 51R X 2, 4.7K X 2 (or suitable parallel/series combination).

5) Capacitor 33pF x 1.

6) Prototyping board /Breadboard.

7) Soldering iron, wires, soldering wire, wire cutter, and header pins.

Internal Circuitry of 741-type Op Amp

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A component-level diagram of the common 741 op amp. Dotted lines outline:

(RED)current mirrors

(BLUE)differential amplifier

(MAGENTA)class A gain stage

(GREEN)voltage level shifter

(CYAN)output stage


A small-scale integrated circuit, the 741 op-amp shares with most op-amps an internal structure consisting of three gain stages:-

The differential amplifier (outlined dark blue) — provides high differential amplification (gain), with a rejection of common-mode signal, low noise, and high input impedance, and drives a

Voltage amplifier (outlined magenta) — provides high voltage gain, a single-pole frequency roll-off, and in turn drives the

Output amplifier (outlined in cyan and green) — provides high current gain (low output impedance), along with output current limiting, and output short-circuit protection.

Additionally, it contains current mirror (outlined red) bias circuitry and compensation capacitor (30 pF).


Differential amplifier

The input stage consists of a cascaded differential amplifier (outlined in dark blue) followed by a current-mirror active load. This constitutes a transconductance amplifier, turning a differential voltage signal at the bases of Q1, and Q2 into a current signal at the base of Q15.

It entails two cascaded transistor pairs, satisfying conflicting requirements. The first stage consists of the matched NPN emitter follower pair Q1, and Q2 that provide high input impedance. The second is the matched PNP common-base pair Q3, Q4 that eliminates the undesirable Miller effect; it drives an active load Q7 plus matched pair Q5, Q6.

That active load is implemented as a modified Wilson current mirror; its role is to convert the (differential) input current signal to a single-ended signal without the attendant 50% losses (increasing the op amp's open-loop gain by 3 dB). Thus, a small-signal differential current in Q3 versus Q4 appears summed (doubled) at the base of Q15, the input of the voltage gain stage.


Voltage amplifier

The (class-A) voltage gain stage (outlined in magenta) consists of the two NPN transistors Q15 and Q19 connected in a Darlington configuration and uses the output side of the current mirror formed by Q12 and Q13 as its collector (dynamic) load to achieve its high voltage gain. The output sink transistor Q20 receives its base drive from the common collectors of Q15 and Q19; the level-shifter Q16 provides the base drive for the output source transistor Q14. The transistor Q22 prevents this stage from delivering excessive current to Q20 and thus limits the output sink current.


Output amplifier

The output stage (Q14, Q20, outlined in cyan) is a Class AB amplifier. It provides an output drive with an impedance of ~50 Ω, in essence, current gain. Transistor Q16 (outlined in green) provides the quiescent current for the output transistors and Q17 limits the output source current.


Biasing circuits

Biasing circuits provide an appropriate quiescent current for each stage of the op-amp.The resistor (39 kΩ) connecting the (diode-connected) Q11 and Q12, and the given supply voltage (VS+ − VS−), determine the current in the current mirrors, (matched pairs) Q10/Q11 and Q12/Q13. The collector current of Q11, i11 × 39 kΩ = VS+ − VS− − 2 VBE. For the typical VS = ±20 V, the standing current in Q11 and Q12 (as well as in Q13) would be ~1 mA. A supply current for a typical 741 of about 2 mA agrees with the notion that these two bias currents dominate the quiescent supply current.

Transistors Q11 and Q10 form a Widlar current mirror, with quiescent current in Q10 i10 such that ln(i11 / i10) = i10 × 5 kΩ / 28 mV, where 5 kΩ represents the emitter resistor of Q10, and 28 mV is VT, the thermal voltage at room temperature. In this case i10 ≈ 20 μA.


Source:- https://en.wikipedia.org/wiki/Operational_amplifier

Source:- https://shop.evilmadscientist.com/productsmenu/762

Building the Project

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1) Make the connections as per the circuit diagram.

2) Test every component before using.

3) Mount the circuit first on the breadboard.

4) With the reference circuit, make the permanent connections.

5) Double-check every connection.

Testing

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The test circuit is opamp astable multivibrator.

A well-known circuit: the Schmitt trigger is implemented.


NOTE: A single +9V power supply is required.

Non Idealities

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Finite gain

Open-loop gain is finite in real operational amplifiers. Typical devices exhibit open-loop DC gain exceeding 100,000. So long as the loop gain (i.e., the product of open-loop and feedback gains) is very large, the closed-loop gain will be determined entirely by the amount of negative feedback (i.e., it will be independent of open-loop gain). In applications where the closed-loop gain must be very high (approaching the open-loop gain), the feedback gain will be very low and the lower loop gain in these cases causes non-ideal behavior from the circuit.


Non-zero output impedance

Low output impedance is important for low-impedance loads; for these loads, the voltage drop across the output impedance effectively reduces the open-loop gain. In configurations with voltage-sensing negative feedback, the output impedance of the amplifier is effectively lowered; thus, in linear applications, op-amp circuits usually exhibit a very low output impedance.

Low-impedance outputs typically require a high quiescent current in the output stage and will dissipate more power, so low-power designs may purposely sacrifice low-output impedance.


Finite input impedances

The differential input impedance of the operational amplifier is defined as the impedance between its two inputs; the common-mode input impedance is the impedance from each input to the ground. MOSFET-input operational amplifiers often have protection circuits that effectively short-circuit any input differences greater than a small threshold, so the input impedance can appear to be very low in some tests. However, as long as these operational amplifiers are used in a typical high-gain negative feedback application, these protection circuits will be inactive. The input bias and leakage currents described below are more important design parameters for typical operational amplifier applications.


Input capacitance

Additional input impedance due to parasitic capacitance can be a critical issue for high-frequency operation where it reduces input impedance and may cause phase shifts.


Input current

Due to biasing requirements or leakage, a small amount of current[nb 2] flows into the inputs. When high resistances or sources with high output impedances are used in the circuit, these small currents can produce voltage drops. If the input currents are matched, and the impedance looking out of both inputs are matched, then the voltages produced at each input will be equal. Because the operational amplifier operates on the difference between its inputs, these matched voltages will have no effect. It is more common for the input currents to be slightly mismatched. The difference is called input offset current, and even with matched resistances a small offset voltage (distinct from the input offset voltage below) can be produced. This offset voltage can create offsets or drifting in the operational amplifier.


Input offset voltage

The voltage is required across the op amp's input terminals to drive the output voltage to zero. In the perfect amplifier, there would be no input offset voltage. However, it exists because of imperfections in the differential amplifier input stage of op-amps. Input offset voltage creates two problems: First, due to the amplifier's high voltage gain, it virtually assures that the amplifier output will go into saturation if it is operated without negative feedback, even when the input terminals are wired together. Second, in a closed loop, negative feedback configuration, the input offset voltage is amplified along with the signal and this may pose a problem if high-precision DC amplification is required or if the input signal is very small.


Common-mode gain

A perfect operational amplifier amplifies only the voltage difference between its two inputs, completely rejecting all voltages that are common to both. However, the differential input stage of an operational amplifier is never perfect, leading to the amplification of these common voltages to some degree. The standard measure of this defect is called the common-mode rejection ratio (CMRR). Minimization of common-mode gain is important in non-inverting amplifiers that operate at high gain.


LIMITATIONS of XL741 :-

1)Saturation levels of discrete opamp do not match with the supply voltage.

2)The offset nulling circuit doesn't work.

3)The physical dimension (area) of the discrete opamp is approximately 10000 times more than the original one.


THANK YOU!