CPE 133 Metronome
For our final project at Cal Poly we created a tempo keeping device called a metronome, we chose this project because of an interest music and digital design. We used past labs in CPE 133 to help design our code and online tutorials to assist in construction the LED circuit on the breadboard.
System Architecture
We implemented this design using a Basys 3 FPGA board, Breadboard, LED’s, Resistors, and jumpers for connection.
The purpose of this design is to increase and decrease the rate at which the LED's flash back and forth. The pace at which they are flashing are called a tempo. The desired tempo was achieved by using the buttons on the Basys 3 FPGA board to increase or decrease the tempo of the light.
If the up button was pressed the lights increased in speed, if the down button was pressed the speed would decrease.
Circuit Architecture
System Architecture:
Button De-bounce: We implemented a button de-bounce in the circuit to ensure that when we clicked a button to increase the tempo by one interval. Without the de-bounce a single push on the button would increase with the frequency of the clock.
Tempo Changer: Tempo changer was used to increase or decrease the MAX_COUNT value used by the clock divider to control the clock output that drives the LED.
Register: A register was used to hold the values of our new MAX_COUNT that was output from the tempo changer. A CLR was added to the register to reset the MAX_COUNT to a value corresponding to a 1-second clock frequency.
Clock Divider: A clock divider is used to slow the clock pulses of the BASYS 3 board, this is done by dividing the clock's frequency by the MAX_COUNT value that has been changed in the tempo changer.
Shift Register: a modified 4-bit shift register was used to output a '1' or high value to our LED circuit on the breadboard on the rising edge of the clock pulse. With 4 LEDs on the breadboard, we were able to output to only 1 of the 4 LEDs at a time, in succession, making a repeating 4-beat sequence. The shift register was modified such that the 4-bit output only contained 1 high value, i.e. "0001" or "0100."