2-Digit Up and Down ODD Numbers Counter From 0 to 99 [Digital Logic Design]

The project "ODD Numbers Counter from 0 to 99" in Digital Logic Design (DLD) utilizes counters and flip-flops to sequentially count and display odd numbers within the range of 0 to 99. A binary counter is employed to increment through the numbers, while a D flip-flop is utilized to identify and filter odd values. This implementation leverages combinational and sequential logic to achieve an efficient and systematic counting mechanism, ensuring accurate representation and tracking of odd numbers within the specified range.

 This counter has two features:

1. Up or Down Toggle
2. Reset option

we'll use D flip-flop to achieve this goal as it is simple to use. A D flip-flop is a digital circuit element used for storing binary data in sequential logic systems. It has a clock input, a data input (D), and outputs a single binary value representing the stored data. The flip-flop's state changes on the rising or falling edge of the clock signal, allowing synchronized storage and retrieval of information.

Warning/Note

Note: always use resistors to apply active ground at pins of the ICs which require active low logic or at all the inputs to provide zero. Otherwise, ICs will put out garbage values.

Note: please use a proper 5V power supply that has plenty of juice in it so that all the logic ICs perform as intended. I used a bread board power supply to provide power.

The components required for this project:

• D-Flip Flop ICs
• AND Gate ICs
• OR Gate ICs
• NOT Gate ICs
• XOR Gate ICs
• 555 timer IC
• Resistors
• Capacitors
• 7-Segment Displays
• Binary to Seven Segment Decoder ICs
• BCD Counter ICs
• Push Button
• Toggle Switch
• Jumper Wires
• Bread Boards
• Bread Board Power supply

First, we will write down all the states for our counter. That is how our odd counter using D-Flip Flops will initiate and continue. To make a 2-digit odd up and down counter we need an enable bit and only need to change the first digit on one’s decimal place to odd number. That is the counter starts from 0 and then goes to 1,3,5,7,9 and then again at 1 not zero i.e. because it’s an odd counter and vice versa. Now for the tens decimal place we will use simple BCD counter IC to count from 0 to 9 or 9 to zero, the clock for this IC will come from the odd counter, we will cascade 1 BCD counter with the ODD up-down counter.

Now in this step we write the truth table so that we can use it to write down our logic.

In the next step we will use the truth table to write down the Karnaugh map to get the logic gate equations so that we can implement our counter using the ICs. K-map is solved in the pictures above. 

The best way to check if we have done the above calculation right is to implement this circuit on simulation software, also it's a good practice to check working behavior of our circuit design before moving to hardware. In this step we will use the equations generated from K-maps so that we can implement our counter in Proteus 8 for simulation.

Now we Construct our simulated circuit carefully keeping in mind to use the pull-up and pull-down resistor at their intended place because otherwise the circuit won't work.

Warning/Note

Note: always use resistors to apply active ground at pins of the ICs which require active low logic or at all the inputs to provide zero. Otherwise, ICs will put out garbage values.

Note: please use a proper 5V power supply that has plenty of juice in it so that all the logic ICs perform as intended. I used a bread board power supply to provide power.